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Design Of Binary Memristor Neural Network

Posted on:2021-11-14Degree:MasterType:Thesis
Country:ChinaCandidate:R KuangFull Text:PDF
GTID:2518306104494244Subject:Software engineering
Abstract/Summary:PDF Full Text Request
In-memory computing is to use memory to store data and use it to complete calculations.It is currently an effective solution to the Von Neumann bottleneck caused by the separation of memory and processor.The crossbar array of memristors can realize the function of matrix vector multiplication through analog calculation based on Ohm's law and Kirchhoff's law,in which processing and data storage are carried out in the same physical location.It effectively implements in-memory calculations and can significantly accelerate neural network calculations.Binary neural network is a special neural network quantification method,which can effectively reduce the network model,reduce the amount of storage and calculation required by the network,and facilitate hardware deployment.At present,there are many non-ideal factors in multi-bits analog memristor,which often affect the accuracy of memristor neural networks,and the lack of suitable algorithms also leads to their limited application.Therefore,it is important to improve the performance of the memristor or design a neural network algorithm that fits the characteristics of the memristor.So,this paper starts with the most mature binary memristor,selects the binary neural network algorithm that facilitates hardware deployment,and designs a binary memristor neural network based on the memristor's in-memory computing principle.And analyze its feasibility through simulation.Firstly,based on the actual array design requirements,binary memristor neural network algorithm program was written in Python.It used 0,1 input and activation value and ±1 weight value to simulate the MNIST handwritten font data set identification task.The appropriate network size was selected through simulation.Then,the synapse device,the array structure and the operation mode were respectively designed for the independent memristor structure and 1T1 R structure.The synapse device was realized by the differential structure composed of two memristors,which can effectively store ±1 weight value and can reduce the impact of non-ideal factors on the device.Finally,the simulation code was written to investigate the effects of device failure,programming failure,reading and writing errors,and retention degradation on the binary memristor neural network,and the corresponding parameters of the devices actually manufactured in the laboratory were measured to analyze the actual effects.Through simulation,it is found that the binary memristor neural network based on the binary memristor design has strong robustness.The reading and writing errors and the device error rate below 1% have little effect on the accuracy of the network.However,the device needs better retention characteristics.This paper designs a feasible memristor neural network scheme and provides some useful references for subsequent memristor neural network algorithm design and hardware deployment.
Keywords/Search Tags:Memristor, in-memory computing, Binary Neural Network, synaptic device, non-ideal factor of devices
PDF Full Text Request
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