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Interface Charge Analysis And Optimization Compensation Of HKMOS Devices

Posted on:2021-10-05Degree:MasterType:Thesis
Country:ChinaCandidate:Z LiuFull Text:PDF
GTID:2518306473980639Subject:IC Engineering
Abstract/Summary:PDF Full Text Request
Power VDMOS devices are now widely used.The most important performance parameters are breakdown voltage(BV)and specific on-resistance(Ron,sp).Conventional power VDMOS devices are limited by silicon limits,and do not perform well in high current and high voltage operating environments.Although VDMOS devices with high-K dielectric HK structure can break the silicon limit and are not affected by charge balance like super junction structures,there are interfacial charges at heterogeneous interfaces that affect device performance.Firstly,this article studies the effects of interface charges on HKMOS devices and models them.The interface charge under different distribution conditions is modeled by the window superposition principle,and the specific influence of the interface charge on the device's electric field,potential,breakdown voltage and specific on-resistance is analyzed.The electrical properties of the interface charge are different,which will have different effects on the specific on-resistance of the device.The presence of negative charges on the interface will have a depletion effect with the drift region,increasing the specific on-resistance.The specific on-resistance model in this paper considers the effect of the drift region width and interface charge on the device,making the model more accurate,and analyzes the effect of interface charge on the relationship between the breakdown voltage of the device and the specific on-resistance.The model of interfacial charge was verified by Medici simulation,and the model is in good agreement with the simulation.The specific analysis and verification of the interface charge under different parameters.Finally,This paper proposes a HKMOS device structure with a charge compensation region—C-HKMOS device.C-HKMOS devices optimize the problems caused by interfacial charges by changing the amount of charge in the charge compensation region.Through the principle of charge superposition and the conservation of electricity,the C-HKMOS device is divided into an uncompensated HKMOS part and an additional compensation region charge effect part for analysis.C-HKMOS devices adopt different compensation measures for different interface charges,and add optimal extra compensation charges to optimize device performance.This paper analyzes the compensation principle of the additional compensation charge to the interface charge from the perspective of electric flux.The optimal compensation is achieved when the electric flux is zero.The effects of different additional compensation charge concentration and charge compensation region width on the device's specific on-resistance and breakdown voltage are analyzed.The width of the charge compensation region is optimized to achieve the best compromise between the specific on-resistance and breakdown voltage of the C-HKMOS device.C-HKMOS device greatly optimizes the problems caused by the interface charge,the performance of the device is greatly improved.The on-resistance of the compensated C-HKMOS device is 46.1%lower than that of the HKMOS device without compensation.
Keywords/Search Tags:Super Junction, High-K(HK), interface charge(Qit), breakdown voltage(BV), specific on-resistance(Ron,sp), analytical model
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