Design Of Driving Circuit For Enhanced GaN HEMT Power Device

The global market for power electronic devices used in communications and computing power is huge.Compared with traditional silicon power MOSFETs,the third-generation wide-gap semiconductor GaN-based power devices have more excellent performance in terms of on-resistance,switching speed,conduction loss,and power density,and are expected to provide high efficiency,Low power consumption,low cost solution.But whether it can give full play to the excellent performance of GaN devices depends largely on the design of its gate drive circuit.GaN HEMT devices have many limitations in driving design: low threshold voltage,low gate capacitance,reverse conducting,etc.The original silicon-based driving scheme is no longer applicable to GaN devices.Therefore,this article will design a suitable half-bridge drive circuit for enhanced GaN HEMT devices and simulate the circuit performance.This paper was completed with the support of the National Key R&D Program of China(Grant No.2017YFB0402800,2017YFB0402803).The main research work carried out is as follows:First,the basic characteristics of GaN HEMT are summarized,including the working principle of the enhanced GaN HEMT device,different implementation methods,and electrical characteristics such as on-resistance,gate capacitance,and body diode.Analysis of the limiting factors of the enhanced GaN HEMT drive circuit design: low threshold voltage,upper limit of gate voltage,dv/dt and di/dt disturbances,etc.Combined with the half-bridge driving method,a corresponding circuit solution is proposed: the separate charge and discharge path technology is used to independently control the charge and discharge speed;the gate voltage clamping technology is used to prevent the gate voltage from exceeding the upper limit;the bootstrap charge path is detected;pass Bootstrap mode and matching level shift circuit to drive the upper bridge circuit;consider the dead time,etc.According to the circuit design indicators,determine the overall architecture and peripheral structure of the circuit design and analyze the circuit principle.Secondly,a driving circuit sub-circuit is designed: an undervoltage lockout circuit to detect the voltage of the lower bridge power device;a bootstrap voltage clamping circuit to prevent its own diode from charging beyond the maximum upper limit of the gate;a level shift circuit to match the bootstrap drive mode;The voltage charging circuit is used to control the charging and discharging path;the dead time control circuit prevents the device from burning through and improving.Simulate the output performance of each circuit separately.Finally,based on Cadence circuit design simulation software,using 0.18?m Bi CMOS process,combined with sub-circuit design to simulate the switching characteristics of the overall drive circuit and static dynamic operating current.Finally,the driving capability of 1.3A/5A charge and discharge at 1MHz was obtained.