Design Of Enhanced GaN Power Device Gate Drive Circuit

The field of power electronics is developing in the direction of high integration,high energy efficiency ratio,and high reliability.Silicon-based power devices,widely used in the field of power electronics,can no longer fully meet the requirements of the higher power density of future power electronic systems.For this reason,people have turned their attention to enhanced gallium nitride(GaN)power transistors with excellent performance.However,the research on the driving technology of enhanced GaN power transistors has not kept pace with the development of enhanced GaN devices,which significantly limits the application of enhanced GaN device.Therefore,the research on enhanced GaN drive technology is particularly important.In this thesis,the primary electrical parameters and the turn-on process of enhanced GaN power transistors are studied.It is found that the enhanced GaN power transistor exhibits nonlinear characteristics during operation.Then,an adaptive multi-stage current driving scheme,which outputs different drive currents at different stages during the turn-on process,is proposed.The scheme effectively reduces the dv/dt of the power system to improve reliability.The starting and ending points of each stage are continuously corrected during the transistor operation.This scheme solves the problems caused by the nonlinearity of the enhanced GaN half-bridge topology and avoids the problem of untimely control due to signal transmission delay in traditional multi-level current drive schemes.CSMC 0.18?m BCD process is used to design the adaptive multi-level current drive circuit.The output stage module with dead zone function,the dv/dt high-speed detection module and the time sample and hold module are proposed.The feasibility of the circuit is verified by co-simulation with enhanced GaN power transistors.The layout of the circuit occupying an area of 140×270?m~2 is designed.The parasitic extraction and post-layout simulation results show that the circuit realizes the intended function,and the loop feedback avoids parasitic effects on circuit performance.The posterior simulation results show that the circuit achieves the established function and the loop feedback avoids the parasitic effects on the circuit performance.The circuit has a maximum static current of 89.39?A and maximum dv/dt is less than 86.1V/ns,which meets the design specifications.