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Design And Implementation Of Wireless Transceiver System Based On AD9361

Posted on:2022-09-30Degree:MasterType:Thesis
Country:ChinaCandidate:X F FengFull Text:PDF
GTID:2518306353977399Subject:Information and Communication Engineering
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With the development of modern society,software radio technology has received more and more attention.This technology is now widely used in scenarios such as radars,drones,radio stations,and basic communication equipment.Software radio technology has the flexibility,programmability and easy upgradeability of software systems.It can realize different functions through software programming under the condition of fixed hardware platform,including the interconnection of different communication systems and meet the requirements of different application scenarios.Now the communication system has a trend of miniaturization and integration,which promotes the development of software radio platforms towards high integration and miniaturization.So it makes sense to design a software radio platform with high integration,strong compatibility and strong programmability.In order to solve the problems of incompatibility,poor integration and flexibility of traditional radio platforms,this article designed a software radio transceiver system implementation based on AD9361.This scheme is based on the idea of software-defined radio.It has the flexibility,programmability and easy upgradeability of FPGA chips.And AD9361 RF transceiver chip has the characteristics of high integration,low power consumption and multiple functions.This scheme divides the whole system into two parts: baseband signal processing and radio frequency signal processing.On the one hand,the baseband signal processing and the configuration of the chip AD9361 are carried out by the FPGA chip;on the other hand,the conversion of the baseband signal and the radio frequency signal and the transceiver of the radio frequency signal are completed by the AD9361.The baseband signal processing part includes two parts: LDPC channel coding and decoding and DQPSK modulation and demodulation.The LDPC coding scheme is based on the two-way recursive coding algorithm under the IEEE 802.16 e standard,and the decoding scheme is the normalized minimum sum algorithm.In this article,a zero-IF baseband DQPSK signal modulation and demodulation scheme is adopted.When modulating,it does not carry out carrier modulation on the signal but directly transmits the two baseband signals to AD9361 for transmission;The improved polar Costas ring carrier synchronization algorithm is adopted in the demodulation scheme.The improved algorithm improves the NCO module and removes the low-pass filter module,which effectively reduces the amount of calculation and system delay.At the same time,important functional modules such as a bit synchronization module based on Gardner algorithm,a frame synchronization module based on Barker code,and a frequency offset estimation module based on FFT algorithm are designed and implemented.The processing of radio frequency signals and the transceiver of radio frequency signals are mainly completed by the AD9361 chip,and the functions of the AD9361 chip are configured by FPGA through SPI.Finally,this article uses Xilinx's K7 chip and AD9361 chip to build a wireless transceiver system hardware platform.Use this FPGA chip to configure AD9361 and generate test signals,and test the hardware function of the transceiver function of the hardware platform.The results verified the functionality and practicability of the wireless transceiver platform.
Keywords/Search Tags:software defined radio, FPGA, AD9361, DQPSK, LDPC, Wireless transceiver system
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