Research On Low-power Anti-radiation Control Module Of Pixel Chip Based On RISC-?

High-energy physics experiments represented by large-scale scientific devices such as particle colliders are an important research topic in physics today.Silicon pixel chips are currently the research focus of position-sensitive detectors.With the deepening of high-energy experimental research,the complexity of the pixel chip increases.Existing silicon pixel chips usually adopt simple on-chip low-precision digitization and progressive scan readout.The new silicon pixel detector puts forward new requirements in the areas of large-area pixel array scanning control,online real-time data processing,low power consumption and radiation resistance.With the rapid development of integrated circuit technology,it has become feasible to integrate a microprocessor in a pixel chip.The microprocessor has the advantages of high integration,low power consumption,fast execution speed,and easy programming.It can realize functions such as intelligent scanning control of the pixel array in the pixel chip,flexible configuration of internal registers,and online real-time data processing,which can reduce data throughput,Reduce power consumption and improve the overall performance of the pixel chip.In this paper,aiming at the control requirements of the pixel detector chip,a RISC-?-based pixel chip low-power anti-radiation control module chip is designed.This article mainly completes the following tasks:1.Based on the RISC-? open source instruction architecture Hummingbird E203,a silicon pixel chip control module is designed.The control module core adopts a two-stage pipeline design,sequential execution,compatible with the RV32I basic instruction set;and expanded the pixel scanning control custom instruction set "Pixel";The controller's data memory and instruction memory use process IP,and carry out anti-irradiation hardening design;use gated clock,power gating and other solutions to achieve low-power design,core power consumption is 71.337mW,compared to not added Low power consumption design saves 43.96%;2.According to the structure of the pixel detector chip,the pixel scanning module is designed,which has the functions of controlling the scanning mode,scanning resolution and scanning area of the pixel array.The control module has complete SPI,IIC and other interfaces,so as to reasonably reduce the consumption of external resources;3.Based on the ASIC design process,the domestic GSMCR013 process is used to complete the back-end physical realization of the control module.Use EDA tool for logic synthesis,verify the timing closure under 50MHz clock,and then complete the layout of the pixel chip control module through the APR tool,and the final layout has passed timing verification and physical verification.At present,the chip has been designed.The overall area of the chip is 2859.88?m×2854.98?m,including PAD;the power consumption is 184.1768mW,which meets the design requirements of low-power silicon pixel chips.