Design Of A Low Voltage 12_bit 5MSPS SAR ADC

With the rapid development of science and technology in the new era,there are many types of analog-to-digital converters(ADC)used in engineering applications,the successive approximation analog-to-digital converter(SAR ADC)stands out among them because of its comprehensive advantages of medium speed and accuracy,low power consumption and cost,simple structure and so on,and is widely used in the fields of portable instrument,industrial control and data/signal acquisition,etc.A 12 bit 5MSps SAR ADC is designed based on the low voltage of 1.2V in the dissertation.First of all,this paper describes the working principle and the main performance parameters of ADC,analyzes and compares several mainstream types of ADC.Afterwards,the design of several important modules of SAR ADC and the pre-simulation of the whole circuit are completed.In the end,the design of the overall layout and the post-simulation of the overall circuit are completed.The content of this paper mainly includes the following aspects: first,for the design of digital-to-analog converter(DAC)capacitor array,the segmented capacitor array structure is used to save a lot of area;at the same time,in the connection mode of capacitor and switch,each unit capacitor is connected with an independent switch to form an overall small unit structure so that it can carry out the overall layout matching in the layout design process,this structure not only solves the matching problem between capacitors,but also solves the map matching problem between capacitors and switches,and also reduces the influence of charge injection effect of switches on the accuracy of DAC.Second,for the comparator module circuit,the structure of three-stage preamplifier cascade with latch is adopted,and the output offset storage(OOS)method is used to eliminate the offset voltage of the preamplifier.Third,this paper focuses on the influence of non-ideal factors such as charge injection effect and clock feed-through error of sampling/ holding switch on the precision of circuit,a switch structure of complementary CMOS and dummy transistor is proposed to solve this problem effectively.Fourth,the design of the logic control circuit is completed,which provides control signals for the analog switches in the DAC capacitor array and outputs N-bit digital coded signals.The design and simulation of SAR ADC circuits are completed based on SMIC0.13?m standard CMOS process,the total area of layout for SAR ADC is about445?m×130?m.The post-simulation experiment results show that the signal to noise ratio(SNR)is 67.60 d B,the signal to noise plus distortion ratio(SNDR)is 64.36 d B,the spurious free dynamic rage(SFDR)is 67.97 d B,the total harmonic distortion(THD)is-65.78 d B,the differential nonlinearity(DNL)is(-0.41?0.56)LSB,the integral nonlinearity is(-0.76?0.04)LSB,the effective number of bits(ENOB)is10.4bit,the power consumption is 1.2m V,the figure of merit(FOM)is 178FJ/conversion-step.