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A Design Of High-performance Integrated Circuit Module And Algorithm

Posted on:2022-04-13Degree:MasterType:Thesis
Country:ChinaCandidate:S H WangFull Text:PDF
GTID:2518306314969589Subject:Master of Engineering
Abstract/Summary:PDF Full Text Request
Since the third revolution of science and technology in the 20th century,the world has entered the age of electronic information.As the cornerstone of the development of the modern electronic information era,the integrated circuit industry has always been one of the main driving forces for the development of the modern electronic information society.Integrated circuit products can be seen everywhere in modern society.People have higher and higher performance requirements for IC products.Therefore,high-performance IC design is the key research direction of IC design.For different IC devices,because of the different problems they face,the pursuit of design goals is different.Among them,the performance of the high-performance integrated unit module is the key to determine the performance of the entire system-on-chip.This paper focuses on the SRAM and floating-point number calculation modules that are commonly used in systems-on-chips and have a greater impact on system performance,focusing on analyzing methods to improve their performance and the balance considerations of performance indicators under different requirements.The last part studies the algorithm design of a high-precision angle digital circuit and understands the influence of the algorithm on the accuracy of the circuit system.To deal with the power consumption problem faced by the memory,a low-power 10T SRAM cell design is proposed.The cell uses a single-ended writing line to reduce power consumption.At the same time,near-threshold technology,multi-threshold technology and multi-voltage technology are also used to reduce power consumption.And the writing mode of non-feedback structure improves the writing ability of the cell at low operating voltage.The reading assisted control technology can eliminate the reading damage problem and improve reading stability.The 10T SRAM cell solves the problem of half-select interference.Compared with other SRAM cells,it has lower power consumption and higher stability,and is suitable for working in common scenarios with higher power consumption requirements.To deal with the problem of insufficient hardware resources of middle and lowend portable devices,a floating point arithmetic unit design with small area is proposed.By analyzing the IEEE 754 floating-point number standard,the Verilog HDL programming language is used to complete the RTL-level design of the floating-point arithmetic unit.The arithmetic unit has the characteristics of small area and low cost.It works at frequency of 100 MHz,which is suitable for working in low-end wearable electronic devices with insufficient hardware resources.To deal with the problem that industrial control requires high-precision angle measurement,an improved resolver-to-digital conversion algorithm is proposed.The algorithm uses PID control algorithm to improve accuracy.Using trial and error method to determine PID controller parameters.Introducing a judgment mechanism to reduce the number of iterations and reduce system response time.The proposed algorithm has been verified to have the advantages of fast angle error convergence and high accuracy.
Keywords/Search Tags:integrated circuit design, high performance, static random access memory, floating point operation, resolver-to-digital conversion
PDF Full Text Request
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