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Research On Memory Testing Technology And Engineering Application In Secondary Screening

Posted on:2021-05-24Degree:MasterType:Thesis
Country:ChinaCandidate:Y J LongFull Text:PDF
GTID:2518306311470784Subject:Master of Engineering
Abstract/Summary:PDF Full Text Request
The level of integrated circuit design is developing rapidly and the world-wide integrated circuit manufacturing level has entered the era of 7nm mass production.In recent years,although the development of integrated circuits in China is changing with each passing day,it still needs a long time to catch up because of the large gap between basic industries,especially in some large scale integrated circuits,the gap is obvious.At present,Sino US relations are complex,some of the most important military level core devices for China's national defense field,because foreign blockades are more strict,it is difficult to guarantee the quality.So many domestic units will select foreign industrial grade devices for over limit use,and screen out defective devices at board level or on the whole machine.Although it can screen out some devices that can be used,it still needs to bear the risk of use.Once a batch failure occurs,the loss is obviously huge.If the secondary screening can be carried out before the board level or the whole machine,the use of risk can be greatly reduced.In this paper,the test method,test principle and test algorithm of memory are studied based on the fault classification of memory.The test platform is J750 K,which is a large-scale digital integrated circuit test system produced by Teradyne.This paper analyzes it on the basis of the existing test hardware resources and obtain there are three problems in memory testing: 1)low equipment utilization;2)the purchased adapter has poor versatility;3)the storage space of graphics vector is small.In this study,we focus on the difficulties in the process of memory testing and combine with J750 K test program development process.Focusing on three different memory types(UVPROM,SRAM and EEPROM),the development process of the test program is taken as an example.It explains how to develop programs for different types of memory.At the same time,it focuses on how to use existing hardware test resources to get graphics vector files for different memory types.Two methods of acquisition are proposed: One is to combine the regularity of memory fixity with the characteristics of fixed format of test file recognized by test machine.Making use of self-made graphic generating software,the memory is transformed into a general logic circuit for testing.Another method is to use MTO module in existing test resources to generate graphics vector file.According to these two methods,the test sample templates of different memory types are established respectively,and the tested memory type graphics vector files are template.This will greatly improve the efficiency of memory programming development and the learning efficiency of new people and make the development of equipment program have inheritance.Thereby,it is solved the problem of low equipment utilization rate.In addition,when we purchased J750 K,which is a large-scale digital integrated circuit test system produced by Teradyne company of the United States,the universality of hardware adapter is poor.In the test process,it often affects the test efficiency.At the same time,the service life of J750 K is long and test motherboard is serious aging.Therefore,in view of the shortcomings of the existing test adapter,the design is improved.It solves the problem of poor universality in engineering application,greatly improves the using efficiency of the equipment,and achieves the predetermined goal,which has great practical and economic significance.
Keywords/Search Tags:J750K, Memory test, Testing technology, Test Adapter, Test pattern vector
PDF Full Text Request
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