A Novel High Stability And Low Power All-mos Voltage Reference Based On Sub-threshold Region

The voltage reference is an important module in analog integrated circuits,and is widely applied in integrated circuits such as analog-to-digital converters,digital-toanalog converters,and dynamic memories.The traditional bandgap reference voltage structure has problems such as high operating voltage,excessive static power and large area due to resistance.Energy problems and the impact of chip heat dissipation on operating performance drive chip design to the low potential direction.So the trend of low power consumption gradually shifts the design of reference power supply circuits to research on CMOS voltage reference source circuits.However,with the continuous development of integrated circuit technology,the length of CMOS transistor is getting shorter and shorter.In the manufacturing process of integrated circuits,it is inevitable that non-ideal factors such as process deviations of various parameters of the transistors will occur,and under the interference of external temperature and noise fluctuation,the circuit would work abnormally,greatly influencing the stability of the reference.In this case,we need to improve the stability of the circuit.Starting from the perspective of low power consumption and high stability,this paper uses the TSMC65 nm technology to design a low-power and high-performance voltage reference source.It works based on the sub-threshold region of the MOS transistor,and the operating current is extremely low,about a few micro-amps or lower,means low power consumption.In addition,it must also ensure that it is not sensitive to process,temperature,power supply voltage.That is,under various external interference factors,it can still output a stable reference voltage as a bias voltage for digital-to-analog converter or amplifier,making these systems operate normally.This article first introduces the types and working principles of the voltage reference and its main measurement factors;then we study the two core modules of the reference circuit: the bias circuit and the current mirror.After comparing the performance of the different bias circuits and the current mirror to the voltage reference.A new type of self-biased current mirror is proposed;then the initial architecture of the design is presented,and the design circuit is simulated,verified and analyzed using Cadence Virtuoso software,and its performance of resisting noise is bad,and some issues when the circuit operating in the real world may not be considered are that the circuit may not operate normally or the output voltage is not accurate enough.For this reason,the following optimizations are carried out:1.Adding an amplifier to increase the equivalent impedance between the output ort and the power supply voltage by using the characteristics of negative eedback,thereby minimizing the noise from the power supply to the output terminal;2.Adding the start-up circuit to avoid the zero degeneracy of the current enerating circuit when the chip is powered on,causing the entire circuit perate abnormally.3.A trimming circuit is added.To avoid a large deviation between the actual utput voltage of the chip and the design value,this module is added for post-processing calibration.Finally,the results show that the CMOS voltage reference designed in this paper has an overall power consumption of 801 nW,the output voltage change from 458.65 mV to 459.10 mV in the operating range of-60 to 110°C.When the voltage changes from 0.9 to 2.4V,the line regulation is 3.6mV/V.Considering the influence of process variation,as shown by the Monte Carlo simulation,we can know that temperature coefficient is 11.3ppm/°C in the operating range of-60 to 110°C,the voltage variation is 454-462mV;In the low frequency DC frequency range,the power supply rejection ratio is 38 dB,and the startup time is 23?s.