Research And Design Of Digital True Random Number Generator

With the rapid development of emerging technologies such as 5G technology and Internet of Things technology,the speed of information dissemination and the number of disseminated nodes have exploded.Under such circumstances,improving and maintaining information security has become increasingly important.A sound and reliable encryption system is the key to ensuring the confidentiality and integrity of the information system and personal information.The true random number generator serves as a basic unit of the encryption system,which provides independent and unpredictable random numbers for the encryption system.Trusted execution and trusted communication in the system play a vital role.This paper analyzes and studies the design structure of the traditional three-segment true random number generator,and points out its functional integrity defects.In the traditional three-segment design,the entropy source,sampling,and post-processing design cannot attack or cause the circuit Inferior random numbers generated by circuit aging respond.In this paper,from the perspective of improving the function of the true random number generator,a new digital true random number generator structure is proposed.By designing an on-chip statistical test module,the randomness of the sampling sequence is monitored in real time.When the fluctuation of the sampling sequence exceeds the When the range of randomness is limited,the error signal is raised to prevent consumers of random numbers from using unqualified random numbers.On this basis,based on the design idea of the builtin test of the circuit,this paper fully utilizes the deterministic and reproducible nature of the sequence generated by the pseudo-random number generator to design the static detection module of the circuit.Before the random number generation process of the true random number generator,the key sampling components and statistical detection components in the circuit are tested to ensure that they are in good working condition.This article fully absorbs the design advantages of the traditional three-segment true random number generator,and aims to improve the stability of the circuit,optimizing a large number of design details.For example,in the design of the entropy source module,by analyzing the physical model of the entropy source,the oscillation loop circuit structure with a periodic restart mechanism is designed,and the clock gating is used to control the oscillation loop to ensure the integrity of the oscillation clock.In the design of the sampling circuit,a configurable frequency divider circuit is designed to solve the problem of poor stability of the sampling circuit when the oscillation ring frequency is too high.A frequency sampling circuit with controllable sampling time is designed to solve the problem of insufficient jitter when the oscillation ring frequency is too low.The frequency detection circuit is designed so that users of true random number generators can estimate the oscillation loop frequency based on the frequency,system clock frequency,and sampling period.The Feng Ruoyman correction circuit is designed,and the contradiction between the discarding of uncertain data and the collection of fixed-length random seeds is solved.In this paper,by designing a control module based on finite state machine,the random number generation process of the true random number generator in this paper is controllable,and has the ability to deal with abnormal states.Finally,this paper implements a circuit implementation on FPGA,and conducts a random static test on its generated sequence,and finally passes the NIST SP800-22 standard and AIS-31 standard tests to verify the random number generation mechanism designed in this paper.