Study On The NBTI Effects Of Nanometer PMOSFET

With the rapid development of 5G,Artificial Intelligence,Cloud Computing,Internet of Things and other emerging technologies,CMOS integrated circuit has stepped into the nano era.With the device's feature size scaling down,the reliability of NBTI(Negative Bias Temperature Instability)of PMOSFET becomes more and more serious,which has become one of the key factors to limit the lifetime of CMOS circuit.Therefore,the NBTI effect of nano-PMOSFET was studied in this paper.Firstly,the failure mechanism of NBTI and related theoretical models were analyzed and introduced in detail,and the degradation degree of PMOS devices caused by NBT stress,hydrogen diffusivity and source drain bias were studied by simulation.It is found that under the NBT stress for a long time,the whole reaction quickly transitions from reaction phase to diffusion phase.Higher oxide electric field intensity and temperature stress will lead to more interfacial trap charge,which will aggravate NBTI degradation.Meanwhile,the higher the hydrogen diffusion rate is,the faster the interfacial trap charge is generated,and the more intense the NBTI reaction process is.Lower source leakage bias can reduce degradation of NBTI and improve reliability of NBTI.Secondly,the early warning circuit of NBTI was designed by studying the on-line monitoring method and early warning technology of NBTI degradation,.This paper presented an NBTI early warning circuit based on hysteresis comparator.The warning circuit adopts the same manufacturing process,design rules,circuit structure,layout form,packaging form and working environment as the test circuit,which can accurately reflect the stress condition and degradation failure mechanism of the circuit under test.The failure of the circuit under test can be predicted in advance for further failure diagnosis.Then,through simulation verification,layout design and taping-out of SMIC chips,the correctness of the circuit function was verified by accelerated life test of the obtained early warning circuit.Then,the NBTI test structures with different gate lengths and gate widths were designed.Furthermore,the accelerated life test scheme of NBTI was designed in detail and the setting of test parameters was established.The experimental results shows that the characteristic curves and key parameters of the device degrade to different degrees after the NBT stress.At the same time,it is found that the enhancement of PMOS device's working conditions,such as the increase of gate voltage stress and the increase of temperature stress,will enhance the NBTI effect of PMOS device,and with the decreasing of device channel length,the negative drift of threshold voltage becomes more serious.Finally,according to the experimental results,taking the influence of temperature,gate voltage,stress time,channel length and channel width of the device on the lifetime of PMOSFET into consideration,the activation energy of NBTI effect and electric field acceleration factor were extracted.The threshold voltage degradation was used as the evaluation standard for evaluating the life of NBTI of PMOS devices.At the same time,the accuracy of the life formula was verified.The working lifetime of the PMOS device under the gate voltage of minus 1.2v was estimated to be about 7 years.The increase of temperature,voltage,stress time and the decrease of channel length and channel width will lead to the shortening of the life of PMOSFET NBTI.These factors should be considered in the design,manufacture and use of circuits and devices to reduce their impact on circuits and devices.Otherwise,the normal working lifetime of integrated circuits will be difficult to guarantee.