Design And Research Of Digital Decimation Filter In ?-?A/D Converter

With the development of science and technology,people's requirements for ADC gradually develop to the direction of high precision,high performance and monolithic integration.The traditional Nyquist ADC is limited by the problem of sampling rate and component matching accuracy,so it can not achieve high accuracy.As an oversampling ADC,sigma-delta ADC adopts low-level quantization structure and noise shaping technology,and then uses digital filtering technology,which breaks through the limitation of traditional Nyquist ADC on resolution and achieves high accuracy.Sigma delta ADC includes analog modulator and digital filter.The analog modulator reshapes the input signal and moves the noise to the high-frequency part.The digital filter filters the modulated signal with low-pass to get the high-resolution digital signal.As an important part of sigma delta ADC,digital filter largely determines the rate,power consumption and area of ADC,so the research on digital filter is very important.Based on a 3-order feedforward sigma-delta modulator,this paper designs and implements a digital filter with 128 times downsampling.The digital filter designed this time consists of a cascade of cascade dressing filters,FIR compensation filters and half-band filters.Among them,the cascade dressing filter adopts a recursive structure and is implemented in a four-cascade manner,while performing 32-time decimation filtering.Aiming at the problem of the passband attenuation of the CIC(Cascaded Integrator Comb)filter,in order to ensure the linear phase,a FIR compensation filter was designed for in-band compensation,and the stopband attenuation was further increased and double downsampling was performed.Considering that the half-band filter has fixed double downsampling,half the coefficient is 0,and the transition band is steep,the half-band filter is used as the last stage.In the design,the Noble identity principle,recursive structure,polyphase decomposition technology,filter coefficient symmetry technology and standard symbol word coding technology were used to optimize and improve the structure and algorithm of the filters at all levels.Based on the third-order feed-forward modulator,the designed digital decimation filter is simulated by Simulink and realized by RTL code,and the output result is analyzed by FFT.The experimental results show that the in band signal-to-noise ratio of the 1 bit digital signal output by the modulator is 104db.After the digital filter,the signal-to-noise ratio can still reach 101.1db,and the effective bits are 16 bits.The designed digital decimation filter realizes 128 times signal decimation and good out of band noise filtering.At last,we use DC tools to complete the chip code synthesis,and use simc 0.18um CMOS technology to design the back-end layout.The final layout area is 0.19mm~2.