NAND FLASH Wafer Test Yield Improvement And Test Time Reduction

With the increasingly high cost of integrated circuit testing,cost control capability to become the core competitiveness of packaging and testing factory.In this paper,will explore NAND FLASH memory test,providing meaningful yield improvement and test time optimization solutions.In terms of yield enhancement,firstly before KGD test introducing a new wafer sorting process step in order to avoid yield loss caused by the difference in performance between the wafers.This step will do pick and classification for incoming wafers according to the demand of different products,the wafer will be assigned to different groups using different test program,and then apply to different products.Actual results show that wafer sorting method avoids up to 21% yield loss.Secondly,the failure for KGD item BIN45: All block erase test parameters improved to enhance product yield,failure analysis and debugging test data to prove BIN45 are soft failure in the critical failure by improving the test parameters to restore nearly 2% yield loss.In terms of test time optimization,firstly developing a new random programming methods to reduce programming time,commonly used approach in upper page programming,each program needs machine generate random pattern,requires time-consuming 850us;while the new method is acquiring random pattern directly from seed blocks,consuming only 50 us.Shortened overall programming test time nearly 200 seconds.Secondly,optimizing and removing test items,optimized an All FF read test,currently check all pages data from all blocks,change to check only first two pages data of each block,this can save about 38 seconds.Also removed an all block erase test,it can save about 15.5 seconds.After the products released to production,process under stable conditions,these two optimized test methods can ensure product test coverage.These methods have been used into actual mass production,the proposed new process step and testing methods,can provide references for subsequent yield enhancement and test time reduction.