Error Patterns In 3D NAND Flash Memory

As a new type of storage technology,NAND flash memory has been rapidly developed in recent years.With its advantages of small size,high storage density,and fast read and write speed,it has become one of the mainstream storage solutions.The reliability and lifetime of NAND flash memory have always been the main obstacles restricting its development.In order to further mention storage capacity and reduce production costs,NAND flash memory manufacturers have gradually evolved from SLC NAND to TLC NAND and even QLC NAND and from 2D NAND structure to 3D NAND structure through the improvement of manufacturing processes and structural design.At the same time as the design and development of NAND flash memory,the reduction in the size of the flash memory has led to the continuous thinning of the channel oxide layer.The three-dimensional structure and the complexity caused by more unit storage values make the reliability of NAND flash memory face a more severe test.Therefore,it is necessary and important to analyze and study the error mechanism in NAND flash memory to improve the reliability of NAND flash memory.To address this problem,this paper firstly focused on the main types of errors in NAND flash memory,and analyzed the current state of research on errors and reliability of the flash memory in China and abroad.In order to obtain the raw error data of NAND flash memory chips,we designed a flash memory test platform,and detailed the controller of flash memory,control program and firmware design of the test platform.A series of tests such as data interference and data retention can be implemented by this platform.The test platform is used to study various types of errors in 3D NAND flash memory.The test platform is used to collect NAND flash memory error data and analyze the characteristics of flash memory error bits with P/E(Program and Erase)cycles and data retention time,as well as analyze the effect of P/E cycles on data retention errors.Based on the conclusion of the performance characteristics of programming interference errors and read interference errors in planar NAND flash memory,we design experiments to analyze the characteristics of these two types of flash memory errors in 3D NAND flash memory,taking into account the characteristics of the 3D NAND flash memory structure.Two sources of data retention errors were verified in test experiments.The raw bit error counts in NAND flash memory increases with the number of P/E cycles and data retention time.After a large number of P/E cycles,the retention performance of flash memory decreases and the number of errors grows faster.We also found the location dependency of flash memory errors in the retention test,with significant differences in the counts of errors in different data pages.Both programming interference errors and read errors showed a value dependency,with cells with lower threshold voltage being more susceptible to programming interference and read interference.