Fuzzy logic-based FPGA routing

Field programmable gate arrays (FPGAs) are very useful devices for rapid ASICs design and fast prototyping. Mapping a specific design to a given FPGA passes through a number of stages. Being a fairly complex device, the design process must be automated. A separate computer program is written to perform each stage. Routing is the last phase in the design cycle. In this thesis, a router for a new family of island-based FPGAs is developed. The architecture of the proposed FPGA is described in detail, and the algorithm to route nets within such structure is outlined. The algorithm divides the routing problem into two steps; global routing and detailed routing. The global router follows a variation of the Lee maze routing algorithm and uses fuzzy logic to evaluate routing alternatives based on several objectives. The detailed router uses a coarse graph expansion (CGE) algorithm with a fuzzified cost function. Both the global and detailed router algorithms were successfully implemented and tested.