Hardware Design Of Switch Router For Network Processors

With the explosive growth of network traffic and data traffic,multi-core network processors based on shared bus are faced with the dilemma of poor performance.In the field of high performance processor design,shared bus technology will be replaced by routing and switching technology which can interconnect more node.At present,the routing and switching technology is only considered in the general multi-core processor applications,its throughput,latency,out of order and other key parameters,does not apply to the pursuit of high-performance network processor processing core interconnect.In this thesis,the Multi-Network-Processor Network on Chip(MNP-NoC)is designed under the support of the National Nuclear High-level Project "XXX Protocol Processor".Firstly,the multi-core network processor architeccture based on the MNP-NoC is analyzed based on the MNP-NoC,including the task characteristics and overall system architecture.Secondly,MNP-NoC scheme is designed,and its key lies in the design of router structure and traffic scheduling algorithm.Then,the MNP-NoC scheme is designed using hardware circuit.The difficulty of this process is the circuit-level implementation of multi-link topology interconnection,router and traffic scheduling algorithm.Finally,the advanced verification method UVM(Universal Verification Methodology)is used to build a verification platform,and in which the function verification and performance evaluation of the design are completed,also,FPGA(Field Programmable Gate Array)design of MNP-NoC is completed.The major contributions in this thesis is:1)dedign of router structure with core of the three-level buffer,two-level scheduling 2)design of target channel rotation algorithm on the rotuter.Combining the characteristics of the router structure,the algorithm improves the forwarding performance of the switch fabric by reordering the packet and loading balance of the path.The results show that,compared with 3D Mesh,3D Torus typical network on chip architecture,MNP-NoC increases the throughput by 70%,25%,and reduce by 80%,and 73%,respectively,and the disorder rate of MNP-NoC is less than 1%while injection rate is below 90%.The work of this thesis have great significance,especialy for the developing of internet,the research and engineering application of core interconnection architecture of multi-core network processor.