Discovery: Distributed simulation of digital and analog VLSI systems

This thesis presents Discovery—a framework for parallel and distributed event-driven simulation of digital and analog VLSI systems. Discovery is an open platform that not only speeds up the simulation using parallel and distributed processing, but it allows the integration of various sequential engines for mixed-mode simulation of a VLSI circuit.; Discovery is based on Transmix—a general purpose distributed simulation protocol with three key features that maximize performance and flexibility. Transmix is mixed—combining conservative and optimistic synchronization methods, dynamic—allowing logical processes to self control the level of optimism, and transparent—working with or without lookahead from the application. The lookahead may be zero, unknown or expensive and error prone to compute. The novelty of Transmix is this combination of features, possible because the tie-breaking model for simultaneous events is relaxed to arbitrary order, and because an extended notion of virtual time is introduced that captures the safety characteristics of an event in a mixed environment. The protocol is described in detail with new local and global synchronization algorithms, proof of correctness, and implementation issues.; The main application of Discovery is distributed simulation of systems described in VHDL-AMS. Since VHDL simulation requires a specific order for some simultaneous events, a general method is developed that extends the physical simulation time with logical information, such that these events are ordered based on different timestamps. This method defines a distributed VHDL simulation cycle, and allows the Transmix dynamic configuration to obtain a 7 to 13 speedup on 16 processors for parallel VHDL simulation.; For mixed-signal simulation, the SPICE analog engine is integrated into Discovery, and two methods are proposed and used successfully for digital-analog synchronization. The experiments show that for parallel simulation of mixed-mode VHDL-SPICE circuits, the best results (6.2 speedup on 8 processors) are achieved with a mixed configuration, where the digital portions are simulated optimistically and the analog ones conservatively.