Monolithic RF frequency synthesis for wireless communications

The increasing demand for a small sized, low cost wireless transceivers with a long battery life calls for a move towards higher levels of integration. However, the design of the frequency synthesizer hinders the development of a fully integrated wireless radio, because of the stringent phase noise requirements for both the transmit and receive synthesizers.; Traditionally, the VCO has dominated the phase noise in the design of the frequency synthesizer.; The objective of this thesis is to provide both circuit and system level solutions to enhance the performance of integrated frequency synthesizers. On the circuit level, two VCO architectures are presented, to reduce the VCO phase noise, as well as its sensitivity to noise pick up.; In order to reduce the VCO phase noise, we propose a VCO architecture based on coupled tank resonators. The coupled tanks provide a higher frequency selectivity, that reduces the phase noise. This phase noise is significantly better than other I-Q VCO implementations reported in the literature with similar power consumption.; We pursue a detailed circuit level implementation of a fractional-N synthesizer with an on chip spur compensation. Even though this technique has, theoretically, no systematic error, circuit level simulations do show high levels of fractional spurs. It seems that a more drastic system architecture change is required.; Therefore, we present a phase domain fractional-N frequency synthesizer architecture that achieves high switching speeds and a very narrow channel spacing. In this architecture, a numerical phase comparator is used as a linear Weighted Phase Frequency Detector. The advantages of the synthesizer architecture, design considerations, and system level simulations are discussed. (Abstract shortened by UMI.)...