Recursive cellular nonlinear neural networks for ultra-low noise digital arithmetic

This thesis discusses the implementation of an innovative method of designing a class of analog cellular neural networks---Recursive Cellular Nonlinear Neural Networks (RCNNs)---for ultra-low noise digital arithmetic. This thesis also describes the design methodology of an open loop analog Cellular Nonlinear Neural Network.; Essentially our ultra-low noise approach replaces the fast switching nodes of logic gates with slewing nodes using current sources driving into capacitors; this provides both low current spikes and low voltage slewing rates. Simulation results demonstrate three orders of magnitude in noise reduction compared to digital counterparts running at the same speed. The noise performance of this Recursive CNN makes it suitable for moderate speed, and high-precision mixed-mode applications. A fully custom analog 4-bit Recursive CNN adder chip has been designed, simulated, and fabricated using 0.35 mum analog CMOS technology and tested. The test results are presented in this thesis. (Abstract shortened by UMI.)...