Serial-serial finite field multiplication

Finite field multiplication is an important primitive in many applications, among which cryptography the most notable. In order to provide a higher resistance against cryptanalysis, cryptographic parameters are continuously growing in size, which constitutes a serious problem for cryptosystems designers. Firstly, the growth of parameters increases the required time, area and the power consumption of cryptographic operations. Secondly, it renders useless any unscalable hardware components. Accordingly, it is essential to implement all primitive operations in a way that limits these effects.; Following these lines, this thesis introduces a novel formulation of finite field multiplication. In the new formulation, all inputs and outputs of the finite field multiplier are communicated in a serial manner, thus the name serial-serial. It is possible to modify any finite field multiplier to allow for serial-serial behavior (e.g. by adding serial-to-parallel and parallel-to-serial registers). However, our formulation exhibits the serial-serial behavior with no modification whatsoever to the multiplier interface and without affecting its performance. Moreover, we present some implementation enhancements that can be applied to the resulting structures.