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Ultra-low power wireless technologies for sensor networks

Posted on:2006-02-24Degree:Ph.DType:Thesis
University:University of California, BerkeleyCandidate:Otis, Brian PatrickFull Text:PDF
GTID:2458390005994658Subject:Engineering
Abstract/Summary:
The new field of wireless sensor networks presents many opportunities and just as many challenges. One particularly difficult aspect of wireless sensing is the implementation of the radio link. To enable energy scavenging, a technique that harvests ambient energy to power the sensor node indefinitely, sub-mW power levels are necessary for the receiver. To allow a small node form-factor, all external surface-mount components must be eliminated. Traditional RF transceiver design techniques are not suitable for achieving complete integration since they rely on frequency synthesis, requiring a surface mount quartz crystal and a power hungry on-chip phase locked loop.; This thesis demonstrates that subthreshold RF CMOS circuit design and high quality RF MEMS passive components are useful tools for reducing the power consumption and increasing the level of integration of GHz-range transceivers. To demonstrate these concepts, two transceivers using these principles were designed, implemented, and tested. One was a multiple channel 3mW receiver. The other is a 400muW super-regenerative receiver with a 1mm3 total implementation volume. A 20m indoor wireless link and operation with scavenged energy was demonstrated. Finally, to further address integration concerns, a CMOS/MEMS reference clock was designed to replace the quartz crystal reference and flip-chip techniques were shown to further reduce the transceiver size.
Keywords/Search Tags:Wireless, Sensor, Power
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