Efficiency enhancement techniques for CMOS RF power amplifiers

Growth in the wireless communication market in recent years has been driving the demand for higher integration of CMOS wireless transceivers in order to achieve lower cost, smaller form factor, and more functionalities. Much recent research effort has demonstrated the feasibility to integrate most transceiver building blocks into a single CMOS die. One of the few remaining blocks that has yet to be successfully integrated is the Power Amplifier (PA). The PA is usually the last active building block in a radio transmitter. Its function is to amplify the signal power up to the required level before it can be transmitted into the air. Due to several limitations of CMOS technology, designing a linear and efficient PA is a challenging task.; A property shared among most PAs is that the maximum power efficiency is achieved only when the PA is transmitting peak output power. Efficiency degrades dramatically as output power decreases. Under typical operating conditions, the PA transmits well below its peak output power, therefore the 1 effective efficiency is much lower than the maximum value. This thesis applies a concept first developed in the vacuum tube era by William H. Doherty to improve amplifier efficiency over a wide range of output power to the CMOS PA problem. Several circuit techniques are also explored in order to optimize efficiency and linearity of CMOS PA, and to allow a high level of integration.; A highly integrated PA prototype was designed in a 0.13mum CMOS technology. It is designed to operate in the cellular DCS1800 band, which has the transmit frequency between 1710MHz and 1785MHz. With GMSK modulated signal, the prototype achieves +31.8dBm output power with 36% power-added efficiency (PAE). The PAE stays above 18% over 10dB range of output power. The PA also meets the GSM/EDGE spectral mask requirement at +25dBm output power with 13% PAE.