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Design Of 55nm CMOS High Efficiency Class E Radio Frequency Power Amplifier

Posted on:2020-02-12Degree:MasterType:Thesis
Country:ChinaCandidate:K YeFull Text:PDF
GTID:2428330578959441Subject:Electronic and communication engineering
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With the rapid development of semiconductor technology,Radio Frequency Power Amplifier based on CMOS technology has attracted more and more attention.Nowadays,in every aspect of life,Power Amplifier has important applications,such as Radio Energy Transmission,Internet of Things and Wearable Devices in the future.In addition,the pursuit of miniaturization and portability of related products is encouraging people to improve the efficiency of Power Amplifier.Therefore,it is of great significance and value to study and design of CMOS class E Power Amplifier.This thesis mainly introduces the design and research of high-efficiency Class E Power Amplifier.Firstly,it introduces the structure,function and design concept of traditional Class E Power Amplifier and Class E Power Amplifier with limited drain dc inductance,and determines that the design is based on Class E Power Amplifier with limited drain dc inductance.Then,the high-voltage breakdown problem of class E Power Amplifier and various factors affecting the efficiency of Power Amplifier under the actual situation are deeply analyzed.Then,under the premise of no breakdown occurs in Class E Power Amplifier,the circuit of Class E Power Amplifier is optimized to minimize or eliminate the influence of various non-ideal factors for the efficiency of Class E Power Amplifier.Based on TSMC 55 nm CMOS process,this thesis designed an efficient Class E Power Amplifier with a working frequency of 5GHz and a power supply voltage of 2.5V.In order to provide sufficient gain,adopting two stage cascade structure including driver stage,to ensure that the drive signal and output signal power level to meet the design requirements;By optimizing the load loop,the overlap of voltage and current waves at the drain output terminal can be improved,so as to improve the efficiency of Power Amplifier.After the circuit layout is completed,simulated and verified by the Cadence Spectre,the results show that when the input power is-5dBm,the Class E Power Amplifier output power is 21.8 dBm,power gain is 26.8 dBm and power added efficiency is 53.2%.
Keywords/Search Tags:CMOS, Class-E PA, Power Added Efficiency, load circuit
PDF Full Text Request
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