Burst-mode clock and data recovery circuits for optical multiaccess networks

Optical multiaccess networks, and more specifically passive optical networks (PONS), can provide high bandwidth to the end user by extending the fiber into the local access network (fiber-to-the-home, -building, -curb). In a PON, multiple users share the fiber infrastructure in a point-to-multipoint (P2MP) network topology. This creates new challenges for the design of receiver front-ends and clock and data recovery circuits (CDRs). Moreover, the challenges depend on the multiple access method that is used to share the bandwidth among users. This thesis presents novel burst-mode CDR circuits for PONs and multiaccess networks. The two access methods considered are optical code division multiple access (OCDMA) and time division multiple access (TDMA).; We designed the first standalone OCDMA receiver with multiple access interference rejection, CDR, and forward error correction (FEC). The receiver supports a bit rate and a chip rate of 155.52 and 1244.16 Mb/s, respectively. We performed BER measurements in a 2D lambda-t OCDMA network using the recovered clock. By not using a global clock, we demonstrated an OCDMA network with the receiver completely isolated from the transmitters. We measured a negligible power penalty when using the recovered clock as opposed to the global clock. With FEC, we measured a coding gain of approximately 3 dB at a BER of 10 -9. We used the coding gain to more than double the number of supported users (5 compared to 2). These experiments, together with the demonstration of a standalone OCDMA receiver, give weight to the argument that OCDMA could provide an alternative to TDMA in PONs.; We also designed two burst-mode CDRs for TDMA PONS. The common goal for both CDRs was to achieve fast phase acquisition to minimize the physical layer overhead for phase recovery. The first design is a 1244.16 Mb/s broadband CDR. We reduced the settling time of the CDR by increasing its bandwidth. We confirmed experimentally the trade off between settling time and jitter. We solved this tradeoff by designing a 622/1244 Mb/s burst-mode clock phase aligner (BM-CPA) based on 2x over sampling. The BM-CPA provides instantaneous phase acquisition (0 bit), much improved jitter characteristics, and meets the specifications of GPON Recommendation G.984.2.; Finally, we designed a burst-mode test solution that allowed us to measure the phase acquisition time of CDRs down to an accuracy of one bit.