Compact modeling of Silicon Carbide (SIC) Vertical Junction Field Effect Transistor (VJFET) in PSpice using Angelov model and PSpice simulation of analog circuit building blocks using SIC VJFET model

This thesis presents the development of compact model of novel Silicon Carbide (SiC) Vertical Junction Field Effect Transistor (VJFET) for high-power PSpice circuit simulation using empirical Angelov model. The model is capable of accurately replicating the device behavior for the DC and Transient conditions. The model was validated against measured data obtained from devices developed by Mississippi Center for Advanced Semiconductor Prototyping at MSU and SemiSouth Laboratories. The modeling approach is based on extracting Angelov Equations Coefficients from experimental device characteristics using non linear fitting for different parameters (temperature, width, etc). Multi-Dimensional Interpolation Technique is used to incorporate the effect of more than one parameter. The models developed in this research are expected to be valuable tools for electronic designers.; The developed SiC VJFET model was applied for investigating the characteristics of few analog circuits. The selected circuits of interest were Voltage Follower, Common Source Amplifier, Current Source and Differential Amplifier.