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Silicon germanium integrated circuits for millimeter-wave imaging and phased arrays

Posted on:2010-06-17Degree:Ph.DType:Thesis
University:University of California, San DiegoCandidate:May, Jason WFull Text:PDF
GTID:2448390002987263Subject:Engineering
Abstract/Summary:
This dissertation presents work in two areas, the first of which is 35--44 GHz power dividers for phased-array transmit systems. A compact active 1:16 single-ended power divider in a 0.18 mum SiGe technology is presented, which achieves 0.8 dB rms gain imbalance and 6° rms phase imbalance at 35 GHz. A second-generation divider is also presented, with 0.3 dB rms gain imbalance and 4° rms phase imbalance at 40.5 GHz. The cascode-node power division approach is shown to be a useful and compact power division topology. A differential broadside-coupled stripline (BCS) structure integrated vertically in the 0.18 mum SiGe interconnect stackup is also developed, which can produce highly symmetric corporate-feed networks (tree structure). A 1:8 power divider is presented which incorporates the BCS structure and attains 0.4 dB rms gain imbalance and 3° rms phase imbalance at 44 GHz. Finally, a sixteen-element 44 GHz beamforming chip with integrated phase shifters utilizing the BCS structure is also presented, and is the first example of a sixteen-element phased-array beamformer at any frequency.;The second area of work is in W-Band (70--110 GHz) imaging systems, and several W-band RFICs are developed in the IBM8HP SiGe process (0.12 mum BiCMOS). A wideband 84--100 GHz LNA with 19 dB gain and 8 dB NF is first presented, along with a second-generation LNA achieving 8 dB more gain. An 80--110 GHz SPDT switch with 2.3 dB insertion loss and 21 dB isolation is developed, and a biased power detector circuit with 14 kV/W responsivity, 40 nV/ Hz output noise, and 2.5--3 pW/ Hz NEP is presented along with noise and responsivity analysis. These circuits can replace current (and more expensive) III-V chips in many applications. Two passive imaging chips are developed using these RFICs. First, a total-power radiometer is presented (LNA + Detector) which can achieve 0.69 K temperature resolution when 1/f noise contributions are removed by electronic or mechanical chopping. Following this is a Dicke radiometer chip integrating a SPDT, LNA, and W-band detector. This chip can achieve 0.84 K temperature resolution by using electronic chopping, which is comparable to current III-V implementations and is the first SiGe or CMOS W-Band imaging chip.;The thesis also contains a summary of the equations required for imaging systems, and an investigation of the additional 1/f noise found in the radiometer chips. The 1/f noise problem is solved using large-area resistors in the bias network layout. The thesis concludes with a presentation of differential SiGe LNA designs and radiometer chips which are designed to be compatible with planar differential antennas.
Keywords/Search Tags:Phase, LNA, Ghz, Imaging, Db rms gain imbalance, Power, First, Sige
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