Fast-lock hybrid PLL and dual-DLL-based all-digital temperature sensor

At Harvard, I developed two application-specific integrated phase-locked loop (PLL) systems, which constitute the bulk of the present PhD thesis. The first system I developed is an integrated PLL frequency synthesizer, which is aimed at the use for wireless transceivers. Frequency synthesizers are well-established applications of PLLs and wide arrays of different PLL frequency synthesizers exist. My contribution is to develop a new PLL frequency synthesizer architecture, which operates in a narrow-bandwidth, integer frequency division mode in steady state, but in a wide-bandwidth, fractional frequency division mode in transient. This hybrid PLL with differing bandwidths is an extension of the widely used Crowley's variable bandwidth PLL. Low noise requires a small bandwidth but fast lock requires a large bandwidth. Crowley's technique overcomes this tradeoff by using a large bandwidth in transient for fast lock and a small bandwidth in steady state for minimal noise. This exploits the fact that noise matters only in steady state and lock time matters only in transient. Crowley's scheme, however, has been used within a fixed frequency division mode. My system, which changes both bandwidth and frequency division mode, not only circumvents the tradeoff between noise and lock time like Crowley's scheme, but also achieves the design simplicity of the integer frequency division architecture and the superb fast lock capability of the fractional frequency division architecture.;In contrast to the first work, my second work is of a higher aim, seeking to broaden PLL's application space. My work for the first time uses delay-locked loops (DLLs), the widely-used variation of PLLs, to build an integrated temperature sensor. In contrast to the widely used integrated temperature sensors, that work by measuring the temperature dependent base-emitter voltages of bipolar transistors and converting them to digital outputs using an analog-to-digital-converter (ADC), my sensor works by measuring the temperature dependent time delays in CMOS inverters using two DLLs. One DLL is used to synthesize a set of temperature-independent delay references, and the other DLL is used as a TDC, which maps temperature-dependent time delays of the open-loop inverter chain to digital temperature outputs, by comparing them to the absolute delay references synthesized by the first DLL. This CMOS temperature sensor may be well suited for microprocessor's thermal monitoring, as it is all digital and uses only standard CMOS transistors with no need for parasitic bipolar transistors. Although there recently appeared, before my work, an inverter delay based temperature sensor, it did not use DLLs but used a counter-based cyclic TDC along with a single delay reference provided by a crystal oscillator. The utilization of DLLs in the delay measurement in my work yields a much higher measurement bandwidth as compared to the prior art for a given resolution. My DLL-based temperature sensor may open up a new design venue for both PLL and temperature sensor designers.