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A Configurable Coprocessor Architecture for Fuzzy Logic Algorithms Implemented on a FPGA

Posted on:2011-02-03Degree:M.A.ScType:Thesis
University:University of Ottawa (Canada)Candidate:Thareja, VishalFull Text:PDF
GTID:2448390002463591Subject:Engineering
Abstract/Summary:
Fuzzy Logic (FL) has grown to be a popular algorithm for designing embedded control systems. FL simplifies the design of a control system, but there are many challenges in implementing FL in embedded control systems. Deep knowledge of hardware design as well as processor integration is required to embed FL in a control system. The proposed design methodology takes a FL algorithm modelled in Matlab and configures the coprocessor architecture to the control behaviours of the model. The coprocessor is then automatically integrated with the Leon3 processor and the entire design is compiled and synthesized to be implemented on an FPGA. The model parameters configure behavioural VHDL generics without changing the coprocessor architecture and automated software scripts help generate the design from model to VHDL easily and quickly. The coprocessor architecture achieves high throughput with minimal area utilization by incorporating FPGA on-chip resources in the coprocessor architecture. FL implementation with the configurable coprocessor architecture with processor offers better flexibility over pure hardware implementations and better performance over pure software implementations. In comparison with other hardware FL implementations, this thesis presents a design flow from model to hardware such that the number of design iterations is reduced. This thesis reviews existing hardware FL architectures, presents a proof of concept design to illustrate the challenges, details the coprocessor architecture and software configuration, and finally presents experimentation results using FL case studies.
Keywords/Search Tags:Coprocessor architecture
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