Design Of Trigonometric Function Coprocessor Based On RISC-V Architecture

Trigonometric function operation is widely used in motor control,aviation navigation and other fields.In the application background of strict power consumption and real-time requirements,only relying on embedded microprocessors with limited performance to calculate trigonometric functions will face the problem of low real-time performance.In the microprocessor,the trigonometric function hardware accelerator is a common method to improve the operation speed and reduce the power consumption.At present,microprocessors based on RISC-V open source instruction sets are more and more widely used in the industry.Therefore,the research and development of trigonometric function coprocessor based on RISC-V architecture has important practical significance for further expanding the application field.In this thesis,CORDIC（Coordinate Rotation Digital Computer）algorithm is used to calculate the trigonometric function.The data is inputted in 24-bits fixed-point mode and output in single-precision floating-point mode.First of all,the input angle is compressed to reduce the range of the input angle and improve the operation speed of the algorithm.Secondly,by finding the Most Significant Bit of the residual angle,and compared with the corresponding constant angle,the area of the selected iteration circuit is reduced.Then,according to the required accuracy,the corresponding scaling factor is selected to compensate,which reduces the compensation times of the scaling factor.Finally,this paper uses HBirdv2 E203 of RISC-V architecture as the main processor,designs sine and cosine trigonometric function instructions,and realizes the coprocessor function through the NICE interface of the main processor.The verification scheme verifies whether the processor has the trigonometric function calculation function according to the designed instructions.The verification results show that the trigonometric function calculation is realized by the processor,and the accuracy of the calculation result is 10^-6.In the worst case,the calculation time is 0.44us.The hardware part of the designed CORDIC algorithm chooses SMIC 40nm technology for logic synthesis,and the synthesis results meet the timing requirements of 50MHz frequency.Its power consumption is about 0.2m W and its area is about 12000um².