Buffer Management Optimization Algorithms For NAND Flash Memory

In recent years,NAND flash memory is gradually applied to embedded systems and enterprise servers due to its aseismic ability,low power consumption,non-volatility and high performance.Compared with the traditional disk,NAND flash memory has the characteristics of remote update,I/O reading and writing speed asymmetry and pre writing erasure.The research of NAND flash buffer management algorithm shows that the current page address mapping algorithm does not consider the characteristics of the address request itself,so it lacks accuracy and flexibility.At the same time,the current page replacement algorithm still remains to be improved because it is not well combined with the local characteristics of page access.In this paper,the novel buffer management algorithms are designed for the characteristics of flash memory from two aspects,which are page address mapping algorithm and page replacement algorithm respectively.Finally,the validity of the proposed method is verified through numerous experiments.The innovation and main work of this article can be concluded as follows:1.In view of the fact that there is no load-selective de-cached page address in the current page address mapping algorithm according to the address translation request,a novel method called DPAM(Demand Prediction-based Strategy for Address Mappings)which is based on page level address mapping request.According to the access frequency of the mapping information,it is stored by using the cold address mapping information table and the hot address mapping information table,and the replacement is performed in the cold address mapping information table.In addition,the concept of contiguous addresses has been added to improve the mapping range of the mapping table and improve the address mapping hit ratio.2.The existing page replacement algorithm does not obtain a highly hit rate,which is caused by the locality of page reference,this paper proposes a new buffer replacement algorithm called PR-LRU(Probability of Reference LRU)to improve the performance of flash memory.The history of the previous reference page calculates the probability of the page's access by variables,and predicts whether a page may continue to be referenced in the future.In addition,this method joined the use of expelling LRU queue,giving the page that should be replaced second times in the buffer area,so as to enhance the hit rate of the page.3.In this paper,by using Flash Sim and Flash DBSim two simulation flash experimental platforms we simulated DPAM algorithm and PR-LRU algorithm on the flash memory chips.Through several experimental analysis,the effectiveness of the proposed method is verified from three aspects: hit rate,number of write operations and run time.After a comparative experiment compared to DFTL algorithm,found DPAM algorithm improve the hit rate of 7.11% and reduce reduced block erase count by 7%.Compared with the traditional AD-LRU algorithm,the PR-LRU in this paper improves the hit ratio by 7% and improves the runtime by 5.1%.