Design Of The 2.5Gbps Front-End Amplifier Of Optical Receiver In CMOS

The rapidly growing volumes of data in telecommunication networks have rekindled interest in high-speed optical and electronic devices and systems. Optic-fiber communication systems are the principal parts of information super-highway for its merits such as great capacity, long transmit distance, economizing energy source, anti interference and anti radiation etc. Thus, it is very important to design high-speed integrated circuits for optical transmission systems with independent property.In the building blocks of an optical transmission system, the preamplifier and the main amplifier are the critical parts. The task of this project is to design a preamplifier and a main amplifier for Synchronous Digital Hierarchy (SDH) STM-16 (2.5Gb/s) optical receiver using 0.18μm CMOS technology and try to simulate to integrate the front-end amplifier monolithically.The performance of a preamplifier has great effect on the performance of an optical receiver. Transimpedance preamplifiers are widely used in the high-speed optical transmission systems. The Regulated Cascode(RGC) mode transimpedance preamplifier is chosen to get a high tranconductance and the active inductance is used instead of conventional resistor feedback for enhancing the bandwidth.The limiting amplifier was chosen to realize the main amplifier in the design since it has the feature such as simple topology, few external components and fast responsibility. A modified Cherry-Hooper amplifier is used to achieve a higher gain-bandwidth product. The bandwidth of the limiting amplifier can be achieved at 4GHz for STS-96 (5Gb/s) optical receiver which is a new breaking through in my design.The skills for high-speed layout design are described. The layout of the front-end amplifier and its verifying eye diagram are finished at last.