A Novel Ferroelectric Memory Design And Research On It's Read-Write Methods

In order to meet the needs of modern society for memory devices with excellent characteristics,we urgently need a non-volatile memory with fast read and write speeds,and the ferroelectric memory is a new type of memory device that meets the above requirements.The core of a ferroelectric memory is a ferroelectric material with polarization characteristics.If the ferroelectric material is made into a ferroelectric capacitor compatible with the CMOS process,the characteristics of the ferroelectric material can be used to achieve the function of nonvolatile storage.In this thesis,a new type of hafnium oxide material with ferroelectricity is used to prepare ferroelectric capacitors,and 2T2 C memory cells are used.At present,the following problems exist in the design of read-write circuits of ferroelectric memories.First,there are polarization fatigue failures,imprint failures,retention loss failures,and aging phenomena in ferroelectric materials.These problems will lead to reduced memory life;The second is that the irrational structure of the memory array will reduce the bit line voltage difference,which will affect the operation of the sensitive amplifier;Third,the threshold loss effect will reduce the polarization voltage of the ferroelectric capacitor;Fourth,different readout methods will weaken the residual polarization strength of the ferroelectric capacitor or accelerate the failure of ferroelectric materials;Finally,when writing data,if the newly written data is the same as the original data in the storage array,it will cause repeated writing,thereby accelerating the fatigue of ferroelectric materials,but due to the existence of ECC circuits,the memory is required to read the corresponding data before each write,so that the data content in the storage array can be clearly defined before the data is written,thereby avoiding repeated writing.To solve the above problems,the following circuit structures are designed and optimized in this thesis.The first is to optimize the memory array to solve the problem of too little bit line voltage difference;The second is to optimize the design of the word line booster circuit,which solves the problem of threshold loss effect and alleviates the occurrence of ferroelectric aging phenomenon;The third is to propose a circuit structure that can increase the read and write times of the ferroelectric memory to solve the problem of repeated writing in the memory cell.The fourth is to design a programmable timing control circuit and optimize the plate line drive circuit to solve the problems caused by polarization fatigue failure and retention loss failure of ferroelectric materials.Finally,the overall circuit was verified through simulation.The ferroelectric memory circuit designed in this thesis can achieve correct read and write functions.Compared with the previous generation ferroelectric memory,the access time of this ferroelectric memory's on-pulse read was reduced from 56 ns to 34.5ns,and the reading speed increased by 38.4%.This thesis introduces the basic working principle of ferroelectric memory and some problems in its design,and proposes corresponding methods to solve these problems.The main innovation lies in the solution of these problems and the improvement of the read and write speed of the final designed complete circuit.The work in this thesis provides a basis for subsequent layout design and tape-out work of ferroelectric memories,and provides guidance for the design of larger-scale ferroelectric memories in the future.