Processor Research And Design Of IEEE1588 Synchronous Terminal System Based On FPGA

With the rapid development of smart digital grid,4G and 5G high-speed communication network,national defense and military industry,industrial control and other fields,the requirements for high-precision time reference are also increasing,and high-precision time reference is obtained by high-precision clock synchronization technology.GPS,Beidou and other satellite means can be used for high-precision timing synchronization between the large-scale system and the large-scale system.However,due to the cost,maintenance,environmental factors and other objective reasons,the small-scale system within each large-scale system cannot be satellite technology used for clock synchronization on a large scale.Therefore,other clock synchronization methods such as IRIG-B code,NTP,PTP can only be used in the small-scale system.NTP is widely used for its advantages of the earliest time,the lowest cost and the lowest implementation difficulty.However,NTP timing accuracy can only reach ms level,and the stability of clock synchronization is poor due to the jitter of network protocol stack,which is difficult to meet the requirements in many application scenarios.Secondly,IRIG-B code,whose clock synchronization accuracy can reach us level,can meet the clock synchronization requirements of most small systems.But IRIG-B code also has its obvious shortcomings,such as the need for special wiring makes later maintenance and upgrading difficult.Therefore,the PTP clock synchronization technology,IEEE1588 clock synchronization technology used in this paper,has been greatly improved on the basis of NTP,which greatly improves the timing accuracy and stability.IEEE1588 can achieve or even surpass IRIG-B code's synchronous timing accuracy with only a little more cost than NTP clock synchronization scheme.At the same time,IEEE1588 can be seamlessly upgraded on NTP clock synchronization network which has been widely used at present,which greatly reduces the upgrade cost and maintenance difficulty.Considering that the IEEE1588 synchronous terminal system designed in this thesis may be applied in different fields,this thesis is different from the traditional IEEE1588 clock synchronization scheme using ARM + DP83640 chip,and adopts the scalable FPGA to replace DP83640 chip,in order to add new features and functions in the future.In addition,the highest clock source not only supports GPS,but alsosupports Beidou,which will realize comprehensive networking in 2020,so as to reduce the dependence on GPS and realize autonomous control.At the same time,other external reference sources such as IRIG-B and IEEE1588 can be selected as clock sources to ensure that the system will not work abnormally due to the loss of GPS or Beidou satellite signals in the process of applying IEEE1588 technology as clock synchronization.In this way,it can also be compatible with the time system equipment adopting other clock synchronization technologies in the system.