The Implementation Of IEEE 1588 Clock Synchronization System Based On FPGA

In recent years, the State Grid Corporation of China is vigorously building a strong intelligent grid. The intelligent substation is also becoming increasingly important as an important part of the intelligent grid. Due to the structure characteristics of the intelligent grid is distributed, it needs keep the consistency and accuracy of top-down action, the intelligent substation and all equipments of it should be operated under the unified time benchmarks. There are many existing clock synchronization technologies, but none is unable to improve the clock synchronization accuracy of the intelligent substation on the premise of guarantee the reliability and cost savings. IEEE1588 precision time synchronization protocol was proposed to provide a new solution for clock synchronization of intelligent substation. Relying on the existing communication network, the intelligent substation is enabled to realize sub-microsecond synchronization accuracy.Based on the IEEE1588 precision time synchronization protocol, this paper has designed a clock synchronization system with the technology of FPGA, DM9000 and DP83640 to solve the problem of clock synchronization of intelligent substation. The system can be used as the master clock to synchronize the rest of the clocks. It also can be the slave clock to be synchronized with a master clock.First of all, the paper introduces the principle of synchronization mechanisms and the related IEEE1588 protocol, including the main clock synchronization model, PTP clock properties, PTP packets and related data sets. On the basis of it, the whole design frame of IEEE1588 clock synchronization system is identified. The main chip is FPGA to complete the relevant procedures and state machine maintenance on hardware parts; Using DM9000 as an Ethernet controller; Using DP83640 as the physical layer chip to make the MⅡ interface independent, stamping and accessing timestamp information; The GPS module is designed in order to ensure the accuracy and reliability when the system is a master clock. The PTP clock state machine and the best master clock algorithm were designed to ensure the stable operation of the PTP system and the discretion of local clock for choosing master clock within the system on software parts; The packet processing program was designed to send and receive packets correctly. The local clock adjustment program was designed, when the local clock was slave clock, it synchronized with the master clock by adjusting the offset and frequency regulation algorithm. Moreover, the related hardware drivers were designed to ensure stable operation of the clock systemAt the end of this paper, the authentication scheme was given, and the synchronization accuracy experiment platform of IEEE 1588 clock synchronization system was carried out in the laboratory to conduct associated test. By analyzing the sample datas and outputs second pulse waveforms to validate the feasibility of the entire clock synchronization system design, the synchronization accuracy meets the requirements of intelligent substation.