Research On Parity Code-based Fault Detection Of Integrated Circuit Against Fault Injection Attack

Integrated circuits are widely used in various fields of social development,such as industrial production,mobile communication,mobile payment and so on.At the same time,the security issues of integrated circuits that arise are also growing,which have received extensive attentions.Side channel attacks and fault injection attacks are main security threats of integrated circuits.As a new attack technology,fault injection attack has become the most effective means of attacking integrated circuits with strong attack capability and short application time.Anti-fault injection attack technologies are developed to ensure the security of the integrated circuits,including physical isolation,environment monitoring and fault detection.Fault detection based on redundant calculation is widely used because of no additional equipment and low cost,including space redundancy,time redundancy and information redundancy.Compared with space redundancy and time redundancy,information redundancy has lower resource and time costs,as well as lower fault coverage.Therefore,it is significant to find the fault detection method against fault injection attack with high fault coverage and low resource consumption.This paper focuses on the following three research aspects in terms of fault detection methods.Firstly,mixed-grain parity code-based fault detection is suggested.Different grain parity code is applied to different parts of the circuit according to fault injection attack.Secondly,word recombination parity code-based fault detection is proposed.The new word consists of the sub words from fault-sensitive paths and fault-insensitive paths,and is applied with parity code.Finally,local replacing parity code-based fault detection is studied,which moves the registers out of the fault injection attack range to make the number of registers odd in the range belonging to the same word.The three techniques are applied to RC5 encryption algorithm and implemented on FPGA.Experimental results show that compared to the traditional word parity,the mixed-grain parity code-based fault detection approach improves the fault coverage up to 29.44% and increases resource usage slightly by 2.48%.Compared to corresponding grain parity code according to the number of recombination paths,word recombination parity code-based fault detection approach has same fault coverage with fewer resources.Within a certain fault injection attack range,local replacing parity code-based fault detection can detect all faults without additional resources.All of the above three methods achieve a tradeoff between fault coverage and resource usage.