| With the continuous development of big data,Internet of Things and 5G communication systems,the demand of data transmission rate is increasing.With the continuous increase of data transmission rate,the negative impacts of various non-ideal factors in high-speed serial communication systems are also increasing,so we must constantly improve the transmission technology.In addition to using equalizer,PAM4 signal is used to the transmission signal of the system instead of NRZ signal.PAM4 signal has been widely used in various communication fields because it occupies only half of the bandwidth occupied by the same rate NRZ signal.This thesis presents a 40Gb/s PAM4 transmitter with a 3-tap fraction-spase equalizer(FSE)in 65 nm CMOS technology.In order to improve the signal integration,a FSE instead of a symbol-space equalizer(SSE)is realized.In addition,the nonlinearity between the high and low bit output current is reduced by employing low-voltage cascode current source.Simulation result shows that the PAM4 signal with a clear eye diagram can be obtained when it passes through a channel with 6.45 dB attenuation at 10 GHz.The minimum vertical eye opening is about 154 mVpp and the minimum horizontal eye width is about 26.54ps(0.53UI).With the rapid development of communication systems,the pre-emphasis PAM4 transmitter studied in this thesis can help solve the problem that the speed of high-speed links is difficult to effectively improve,which has important theoretical significance and important engineering application value for the realization of high-speed PAM4 transmitter. |
