Research On On-chip Reconfigurable Filter Based On CMOS Process

With the continuous evolution of communication standards,existing multi-frequency and multi-mode wireless receivers need to use a large number of off-chip RF devices(such as filter),which greatly increases the volume and cost of wireless equipment and the interference between different RF devices.Therefore,people eagerly seek a reconfigurable RF SoC(System-on-a-Chip)solution to integrate the RF front-end circuit into a chip with high reuse rate.Although most RF front-end circuits,such as mixers,low-noise amplifiers,and local oscillators,can be implemented on a single chip.limited by the shortcomings of on-chip devices such as low Q,high insertion loss and limited dynamic range,the design problem of on-chip reconfigurable filters remains to be solved eagerly.In this paper,two popular on-chip reconfigurable filter solutions are studied.The N-path filter has excellent performance in the lower frequency band,and the Q-enhanced filter is suitable for the higher frequency band.The main work is as follows:(1)The state space analysis method is used to study the filtering principle of the differential first-order N-path resonator.And a source follower is used at the output stage to design a first-order differential N-path filter.The filter has a tuning range of 0.2GHz to 1.4 GHz.The in-band input P1dB is greater than-5dBm.The out-of-band rejection is greater than 14dBc at 100MHz from the center frequency.The in-band noise figure is less than 6dB,and the in-band insertion loss is less than 1dB.Based on this methodology,the Gm-C filter design theory and the N-path simplified analysis methodology are used to couple three first-order N-path resonance units together to obtain a third-order N-path filter.The filter has a tuning range of 0.2GHz to 1GHz.The bandwidth is from 8MHz to 15MHz.The filter has 5dB NF,+15dB gain,-24dBm in-band input P1dB,40dBc out-of-band rejection(Af=50 MHz).The tape-out and analysis is finished.(2)The shortcomings of the traditional Q-enhanced filter and the limitations of the two driving modes of voltage and current are introduced.Two second-order filters are subtracted to obtain the fourth-order frequency selectivity,which alleviates the Q-enhanced filter's trade-off between frequency selectivity and dynamic range.The noise analysis of the filter topology is finished.The switch-capacitor and switch-resistance control scheme is used to achieve discrete tuning of the filter's gain,bandwidth,and center frequency.The layout simulation is completed.The filter has a tuning range of 2GHz to 3.6GHz.The bandwidth is adjustable between 100MHz,200MHz,500MHz.The passband ripple is less than 1dB,and the in-band P1dB is better than 2dBm.