| The integrated circuit test system is a tool for testing the working performance and electrical parameters of integrated circuits.The most commonly used method is: the integrated circuit test system reads the test vector,applies input excitation to the pin of the chip under test,tests the pin output response of the chip under test,and compares the output response with the expected response to determine whether the chip under test meets the standard.In the process of IC testing,because the hardware cannot achieve the theoretically infinite storage capacity,only a part of the test vector information can be stored at a time,so a mechanism is needed to replace the hardware memory information in a timely manner.In response to the above problems,this paper designs a scheduling module to ensure that the hardware replaces memory information at the appropriate time,and can find test vector information at any time during testing.Scheduling module plays a role in the integration of the integrated circuit software system.This paper has conducted the following research on the scheduler of integrated circuit test vectors:(1)Design and implement the scheduling module from the demand.The scheduling module implements the scheduling of the test vectors,which ensures that the hardware can find the true information of the test vectors at any time during the test,and at the same time can reduce the number of hardware memory replacements,shorten the test time,and improve the test efficiency.(2)Designed scheduling algorithm.The scheduling process requires a scheduling algorithm to process the test vector set.Through comparative analysis,it is found that the scheduling mechanism is very similar to the optimal page replacement algorithm OPT of the cache memory.Therefore,this paper designs a suitable scheduling for the project based on the optimal replacement algorithm.algorithm.(3)Due to the existence of the vector opcode Opcode in the test vector,a variety of scheduling situations will occur during the testing process.This article has carried out detailed analysis and optimization of these scheduling situations.There are 11 scheduling situations involved in this paper. |
