12-bit High-temperature SAR ADC Design With Chopper Stabilization

With the continuous development of electronic technology,digital systems are widely used in various research fields due to their advantages of strong stability,easy transmission,and anti-interference,and continue to form many independent disciplines.The objects processed by digital circuits are digital signals,but most natural signals in life are analog signals such as temperature,light,and sound.Compared with digital signals,analog signals are more susceptible to noise and have higher processing costs.Generally,analog signals need to be converted into digital signals,and the core of analog-to-digital conversion—Analog-Digital Converter(ADC)research to Important.The successive approximation analog-to-digital converter(SAR ADC),as one of many ADC structures,has the characteristics of low power consumption and high resolution,and has been widely used in automotive electronics,petrochemicals and other fields.However,as the complexity of the application environment continues to increase,especially in the high-precision field focused on high-temperature environments,SAR ADCs based on traditional normal-temperature structures have been unable to meet the performance level requirements under high-temperature conditions.Important problems to be solved urgently.There are still many gaps in the research of high-temperature chips in China,especially in the direction of high-temperature resistant ADCs.Therefore,In this paper,the circuit principle design,physical layout design and other aspects of high-temperature SAR ADC chip are respectively researched,and a 12-bit high-temperature SAR ADC chip with chopping is designed.In the design process of 12-bit high-temperature SAR ADC,a new mathematical model with chopped stable sample-and-hold structure is established in this paper to address the effect of the flicker noise and nonlinear factors of the SAR ADC sample-and-hold module on the accuracy of the sampled signal.Based on the above model,the time-domain and frequency-domain characteristics of the signal are analyzed.From the aspects of noise reduction capability,circuit complexity,power consumption,and sampling speed,the structure of the chopped stable sample-and-hold circuit is studied.Finally,a sample-and-hold circuit with chopping that meets the performance requirements of 12-bit high-temperature SAR ADC is designed and implemented.Further research on the realization of high precision and high sampling rate of SAR ADC under high temperature conditions.Starting from the two aspects of circuit design and layout design,on the one hand,the chopping noise reduction method is used to improve the accuracy of the SAR ADC sampling signal,and on the other hand,the layout optimization methods such as center symmetry and square cross are used to reduce the mismatch caused by high temperature devices Noise,optimization improves the accuracy of high-temperature SAR ADC.Based on the 0.18?m CMOS process,a 12-bit high-temperature SAR ADC chip is designed and implemented.The simulation results show that the chip has a 1MHz bandwidth sampling frequency and an effective number of 10.65 bits at normal operating temperature at high temperature of 175?,the chip can achieve 10-bit effective number of bits and a signal-to-noise ratio of 62dB.This design is based on meeting the performance requirements of the 12-bit high-temperature SAR ADC,and has been taped out to obtain a physical chip.