Research Of Algorithm And Implementation Of Adaptive Decision Feedback Equalizer For High Speed Link DDR

As the data transmission rate and operating frequency of various electronic devices continue to increase,such as personal computers,servers,and mobile devices,people have higher and higher requirements for the memory of these electronic devices.For example,in the case of personal computers,The latest protocol that has been introduced is the DDR4 protocol,and in the near future,the DDR5 protocol will also be introduced.Compared to DDR4,DDR5 will have faster data transfer rates and lower operating voltages,so DDR5 will encounter more complex and more difficult Signal Integrity(SI)issues such as reflection,inter symbol interference,crosstalk.In order to solve the signal integrity problem of DDR5,the use of equalization technology may be added in the DDR5 protocol.The equalization technology has matured in the highspeed serial link,so we can learn from it,but at the same time,the structure of DDR and the structure of high-speed serial link also have many essential differences,so these equalization techniques cannot be directly applied to DDR,which also needs to be modified to suit the practical application of DDR.At the same time,for the design of high-speed links such as DDR,signal integrity simulation before production and use is an indispensable step,so in the circuit simulation software of DDR5,it is also necessary to add equalization options.In the 2017 version of the ADS software,the equalization option has been added to the simulation of DDR.Therefore,this article first introduces the structure of DDR in the past,and discusses the changes in DDR5 and previous generations of DDR and the challenges that may be encountered in its design.It then introduces the existing equalization techniques in highspeed serial links and the different equalization requirements between high-speed serial link and DDR link.After studying the advantages and disadvantages of the linear continuous equalizer(CTLE)and the decision feedback equalizer(DFE),we believe that CTLE and DFE can be used to improve the signal of the DDR link.Therefore,based on BER_Tool,a BER simulation software developed for the DDR4 link which is accomplished by our laboratory,the equalization algorithm for the DDR link was implemented by adding the selfwritten equalization algorithm and the call of the IBIS-AMI algorithm module,which become an equalization simulation software for DDR links,we name it DDR5_Tool.In orderto verify the correctness of the equalization algorithm in our software,the equalization algorithm in the commercial circuit simulation tool is compared with the equalization algorithm in our software,and the error between the results is small,which proves that our own equalization algorithm is real and reliable.In DDR5_Tool,the worst-case pattern can be calculated at a given bit error rate.The equalization algorithm or IBIS-AMI model is used to observe the equalization effect to determine which type of equalization algorithm or AMI model can prove the signal on the DDR5 link,which would help users to analyze and design DDR link more easily.