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Design And Implementation Of SATA High-speed Mass Storage System Based On FPGA

Posted on:2020-03-25Degree:MasterType:Thesis
Country:ChinaCandidate:X H ChengFull Text:PDF
GTID:2428330602951945Subject:Signal and Information Processing
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In modern communications,high-speed data transmission technology is developing very rapidly,and storage is becoming more and more important in various fields.Also in the radar field,the current radar system not only requires the storage of the traces,but also the storage of the original data.In response to this demand,this thesis uses the interface control card based on SATA3.0 electronic disk array + FPGA to build mass storage system.The SATA3.0 electronic disk array is a storage carrier and is composed of 8 m SATA solid-state hard disks.The structure can meet the harsh airborne application scenarios.The interface control card is responsible for external fiber interface,data recording and playback,file system management,and operation management of the storage system.The Micro Blaze soft core is used as the control center in the software design to facilitate command parsing and file system establishment and management.Combining the above design ideas,this thesis mainly completed the following work: This thesis firstly expounds the research background,significance and research status of large-capacity storage systems,and then elaborates on the FPGA-based SATA disk mass storage system.And the description highlights the software and hardware architecture design and its advantages of this system.Finally,according to the design of the project plan,Xilinx Virtex-7 series FPGA and Vivado development tools are selected as the development platform,adopting top-down design ideas and modularization.The design method,respectively designed Gigabit Ethernet,Micro Blaze soft core module,high-speed serial transceiver,DDR3 memory controller,SATA disk array,file system management and other modules and through debugging,and finally achieved self-test on the FPGA,Record,playback,transfer and other functions.This article has three highlights: First,the DDR3 is controlled by the AXI bus,which shortens the transmission overhead and development cycle of DDR3,which is convenient and fast.Second,it implements a custom file system with FPGA,and can support the file to be randomly deleted and the function of space reuse;thirdly,it is easy to expand the disk array by a single SATA disk,and the system is upgraded and maintained conveniently.
Keywords/Search Tags:SATA3.0, Mass Storage, FPGA, MicroBlaze, Interface Control Card
PDF Full Text Request
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