Design And Implementation Of High-speed Mass Storage System Based On FPGA And SATS3.0 Interface

The development of information technology is inseparable from storage technology,so studying the storage system is necessary.The purpose of this project is to design a high-speed and large-capacity storage system with SATA3.0 solid state drivers on FPGA platform.The main job is to research and realize the key technology of SATA3.0 read / write controller.SATA is a high-speed serial bus protocol,it uses two pairs of differential lines for serial transmission and reception,it can effectively avoid bus interference,therefore it replaces the PATA and becomes a new generation of transmission interface.SATA has high transfer rate and error correction capability,it also supports hot-plugging and as a result it's widely used.SATA3.0 interface supports the maximum transfer rate of 600MB/s and is suitable for the high-speed large-capacity storage system.This essay introduces the four layers of SATA3.0 protocol: physical layer,link layer,transport layer and application layer.The function of each layer and the main functional modules are introduced.Then,the essay introduces the method to configure physical layer transceiver,design link layer CRC check module,scrambling module and the transport layer encapsulation module,with the Quartus II design platform and the bottom-up modular design method.The last part of the essay paper gives the results of software simulation and board level test.The First simulation software Modelsim is used to do the functional simulation of the various modules and the simulation results show that each module can achieve its logical function.Finally,the board level transmission test shows that the system can correctly read and write and the transmission performance meets the SATA3.0 protocol requirements.