The Study On The Neutron Single Particle Effect Of 28nm FDSOI

This paper aims to study the single-event effect of 28 nm FDSOI devices.Based on the Sentaurus software and HSPICE simulation tools,the single-event effect of four types of devices,the influence of charge-sharing effect and the single-event resistance of 28 nm FDSOI integrated circuits are studied.The specific work is as follows:The first part is the single-event effect simulation of four types of devices.In this paper,3D models of off-state RVT NMOS device,off-state LVT NMOS device,open-state RVT NMOS device and open-state RVT PMOS device are constructed,and single-event effect simulations are performed.Through simulation,it is found that:(1)RVT devices have higher SET pulse peaks and more accumulated charges than LVT devices.(2)Parasitic transistor amplification effect does exist in the off-state RVT NMOS device,but the parasitic amplification factor is about 1~1.2.And there is no parasitic amplification effect in the offstate LVT NMOS device;(3)The open-state RVT NMOS device has the strongest ionization charge collection capability,and the largest parasitic amplification magnification,which is about 4.2~5.9;(4)The charge collection capability of the open-state RVT PMOS device is only slightly greater than the off-state RVT NMOS device,which is approximately 1.3.In the second part,the influence of charge-sharing effect on the single-event effect of the devices is studied.In this paper,3D simulation models of adjacent NMOS structure and CMOS structure are constructed,and the same single-event effect simulations are performed.It is found that:(1)The charge-sharing effect between devices in the 28 nm process is very obvious;(2)In the adjacent NMOS structure,the charge-sharing effect will aggravate the single-event effect of the devices,making both the SET pulse peaks and the accumulated charge amount of the direct target device and the adjacent device significantly increase.(3)In the CMOS structure,the charge-sharing effect weakens the single-event effect of the devices,and the accumulated charge of the direct target device and the adjacent device both decrease;(4)The charge-sharing effect suppresses the parasitic amplification effect of the devices.The third part is the study of single-event resistance of integrated circuits under 28 nm FDSOI process.A classic 6T SRAM cell circuit and a 4-level inverter circuit are constructed,and SPICE hybrid simulations are performed.It is found that:(1)when the charge-sharing effect is not considered,the critical charge for single-event upset of the SRAM cell is 10e-15,and the single-event upset threshold is 0.3p C/um.That is,the 28 nm FDSOI SRAM circuit still has strong single-event resistance.(2)When considering the charge-sharing effect,in the cases of the adjacent NMOS structure and the CMOS structure,the SRAM cell does not flip over the entire LET range.That is,the charge-sharing effect enhances the single-event resistance of the SRAM circuit;(3)In the inverter chain of this paper,the SET pulse generated by a single device causes the pulse width of the circuit output to increase by 2.2%;(4)The SET pulse generated in the CMOS structure also causes the pulse width of the output to increase.However,the magnitude is smaller than that of a single device;(5)The SET pulse generated in the adjacent NMOS structure causes the pulse width of the output to decrease,where the reduction is up to 45.7%.