Multi-buffer Trace Implementation

With the rapid development of the SoC(System On Chip),the integration and complexity of So C has been greatly increased,which lead to more verification pressure and challenge for the trace and debug system.It will transfer a large amount data to the trace receiver when there are many trace sources.If do not take any process,all the trace data will send out of the chip directly and stored in the external memory,which will generate heavy traffic loads and take up large on chip resource.Hence the key problem is to find the way to effectively decrease the amount of data so as to reduce the traffic loads.To solve the problems above,the key concept is processing the trace data according to the different debug scenario,which meet the requirements of optimization of traffic loads and store resources.For the trace system,there are a large number of trace sources so that multi buffer architecture was introduced to connect with trace interface to achieve parallel trace.To meet with the different debug demands,a novel filter architecture was proposed in this paper to discard the messages which are not interested in by setting a series of filter rules.Then we will sort the message with severity level to decide whether needed to be further processed.Message with low severity level will stored in a DDR ring buffer that data can be override by subsequent data.For further data process mentioned above,mainly divided into two parts.One is that using STPv2.2 encoder to package data from different sources because message from different trace sources based on various protocols,so it's necessary to encapsulate trace data with a basic protocol.The encoder separates the data stream into parts,ASYNC and DIP packet was appended to each stream which will provide alignment synchronization and data integrity check function.The other one is introducing the data compression module,mainly use the deflate lossless compression algorithm to maintain the data integrity because most of the trace message type is data type.The experimental results show that the traffic loads has been reduce about 51% by introducing the filter and ring buffer architecture and the deflate compression module can optimize the data volume by 78% compared with the before optimized trace system,achieving the optimization target of 30%.