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Research And Design Of High Precision Digitally Controlled Ring Oscillator For ZigBee System

Posted on:2020-09-20Degree:MasterType:Thesis
Country:ChinaCandidate:X GengFull Text:PDF
GTID:2428330590995548Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
Over the last decades,phase-locked loops(PLLs)occupy an irreplaceable position in wireless communication systems as local oscillators.The digitally controlled ring oscillator(DCRO)is the footstone of the all-digital phase-locked loop(ADPLL),which determines the frequency range of the entire PLLs output and the out-band phase noise.With the rapid development of the communication industry,people's demand for high-quality and high-speed communication continues to grow,so the research on the DCRO with a high resolution has also received extensive attention.In this thesis,the DCRO circuit applied to the ZigBee system is studied in depth,and the design of the DCRO circuit is completed based on the TSMC 130 nm CMOS process.The Sigma-Delta DCRO designed in this paper mainly includes delay unit circuit,capacitance tuning array circuit,Sigma-Delta modulation circuit and an output buffer.The delay unit circuit adopts a differential structure,which can shorten the delay of signal transmission;The capacitor tuning array circuit adopts a resonant network,which is formed by a coarse tuning and a fine tuning capacitor array in parallel,and the fine tuning unit innovatively comprises two PMOS capacitor pairs that are inversely connected in parallel,which increases the resolution frequency of DCRO;The Sigma-Delta modulation circuit can ensure the resonance frequency meets the requirements,while further improving the resolution of the oscillator;The output buffer functions as the voltage buffer of the oscillator's output signal.The simulation results show that the Sigma-Delta DCRO can work normally,and the center frequency of the output signal is around 2.4GHz.Moreover,this circuit can achieve a high frequency resolution of 33 kHz,and the phase noise is-107.9dBc/Hz@1MHz.In order to further achieve design target of DCRO circuit with high performance and low power,this thesis also proposes an injection-locked DCRO operating at near-threshold supply voltage.The circuit uses interconnect capacitance to change the phase of the output signal of the delay unit,which improves the phase noise performance of the oscillator.In addition,the traditional MOS switch is improved,which overcomes the shortcoming that the conventional MOS switch cannot fully work under low voltage.The simulation results show that the injection-locked DCRO can work normally,and can realize 12-phase output.Furthermore,the phase noise is-114.85dBc/Hz@ 1MHz,and the power consumption is only 0.68 mW,which truly realizes the design indicators of high performance and low power.
Keywords/Search Tags:DCRO, frequency resolution, phase noise, Sigma-Delta, injection-locked, low power
PDF Full Text Request
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