Research And Design Of L/S-Band RF Transceiver Front-end Integrated Circuits

In recent years,cognitive radio,software radio and configurable multi-standard multi-band/wideband transceivers have attracted more and more attention.The wideband RF transceiver front-end has been widely studied and adopted due to its low power consumption,small size and low complexity.This paper researches the techniques of wideband RF transceiver front-end integrated circuit applied in L/S bands,two RF receiver front-end circuits and one RF transmitter front-end circuit are designed in a standard 0.18?m CMOS process.In view of the large dynamic range of the signal acquired by the receiver,the front-end of the RF receiver is realized by bypassed LNA and variable load LNA combined with the corresponding downconvert Mixer respectively.Specifically,the first RX-FE includes wideband LNA and Mixer based on common gate type amplifier with capacitive cross-coupling technique,LNA utilizes inter-stage inductors,shunt peaking inductors and current injection technique to expand bandwidth and reduce noise.When LNA is bypassed,the high linearity Mixer directly accesses the signal path,which adopts a T-type matching network to achieve wideband matching.The wideband LNA and Mixer in the second RX-FE are mainly based on the positive-negative feedback structure.In the LNA,for saving chip area,the traditional bulky inductors are replaced by current sources that are capacitively cross coupled,and a load switching structure is added to convert high gain mode and high linearity mode.The second downconvert Mixer utilizes the dynamic current injection technique to improve its noise performance.Considering the characteristics of the large input signal amplitude processed by the front-end of RF transmitter,the circuits are all implemented by MOS transistors with 3.3V power supply voltage to improve linearity and breakdown voltage.The upconvert Mixer adopts the source degeneration inductor with additional gate-source capacitor to achieve narrowband input matching and high linearity.The driver amplifier selectes the pseudo-differential cascode structure to ensure the linearity and stability of the circuit.The designed RF transceiver front-ends cover the expected frequency range of 1.3-2.3GHz and achieve the desired performance.The first RX-FE chip occupies an area of 3.61mm²,whose post-simulation results show that:S₁₁<-10.1dB,S₂₂<-12.7dB,NF<4.3dB,gain adjusted between 20dB and4.78dB,and the IP_1dB>-10dBm in the low gain mode.The second RX-FE chip occupies an area of1.16mm²,whose post-simulation results show that:S₁₁<-11.5dB,S₂₂<-10.4dB,NF<4.83dB,gain adjusted between 20dB and 4.7dB,and the IP_1dB>-10dBm in the low gain mode.The TX-FE chip occupies an area of 0.83mm²,whose post-simulation results show that:S₁₁<-11dB,S₂₂<-10dB,gain is larger than 10dB,IP_1dB>-8.61dBm and OP_1dB>5.02dBm.