Design Of Mixer And Driver Amplifier In 0.6~1GHz Transmitter

The rapid development of wireless communication technology has placed new demands on the RF front-end circuit.In the RF front-end of the transmitter,the mixer and the driver amplifier play an important role in up-converting and driving the power amplifier respectively.Therefore,it is important to design a high-performance,lowpower,small-area mixer and driver amplifier circuit.Based on the HHNEC 0.18μm BiCMOS process,the mixer and driver amplifier for the RF front-end of the 0.6~1GHz wireless communication system are designed.The paper first introduces the basic theory of the mixer,analyzes the linearity of the Gilbert mixer,compares several linearity enhancement techniques.Then based on the double-balanced Gilbert mixer,PMOS/NMOS complementary structures are used in the transconductance stage to achieve current-reuse,gm-boost,current bleeding,and derivative superposition techniques,while optimizing power consumption,gain,noise,and linearity simultaneously.And Negative impedance technology is implemented using cross-capacitance coupling to improve the linearity of the mixer without increasing power consumption.In addition,the basic theory of the driver amplifier is introduced.Based on the common-emitter SiGe HBT driver amplifier,a bias network for improving temperature stability and linearity is added,and the input impedance matching is realized by the base series resistor while the output impedance matching is achieved by amplifier's own impedance.Finally,the design verification process of the integrated circuit layout is introduced,and the layout design points of the two circuits are explained.The post-simulation of the key parameters was performed.The post-simulation results show that the DC power consumption of the mixer is less than 2.7mW,the layout area is 830μm×550μm,the conversion gain is greater than 3.2dB,the input third-order intercept point is greater than-2.8dBm,and the noise figure is less than 11.7dB.The DC power consumption of the driver amplifier is less than 38.6mW,the layout area is 750μm×650μm,the power gain is greater than 8.5dB,the output 1dB compression point is greater than 19.5dBm,the power added efficiency is greater than 43.5%,and the input and output reflection coefficients are less than-10 dB.