Study On Active IC Metering Techniques Against Overbuilding Of IC

With the rapid development of process technology,the integration density of integrated circuit(IC)grows fast.Nowadays,hundreds of millions of transistors can be integrated on a single die.This aggravates the difficulty in IC design,which forced the IC design companies to invest more money and effort in product design.Traditional vertical IC business model cannot meet the requirements for the shrunk time-to-market.More design companies choose to outsource the chip manufacture to the foundries abroad,who expertise in chip fabrication.This has led to the separation of IC design and IC manufacture.The horizontal IC business model hence appears and become popular.The horizontal business model facilitates each party to do what do the best.However,this also causes problems of infringement of copyright due to unauthorized IC overbuilding as the chip designer has no control of the fabrication process.On one hand,if a chip applied in defense and military information is pirated,it will cause threats to the security of the nation.On the other hand,the chip design company invests much money and effort into the chip design.However,the foundry possesses all the detailed manufacturing information while the post fabrication process is totally transparent to the chip owner.Such asymmetric relation made the chip owner suffer great huge economic loss.To overcome these weaknesses due to the IC overbuilding,IC metering scheme was proposed to enable designers to control back-end production of chip,and protect their chips against piracy or overbuilding.Existing IC metering methods can be divided into active and passive IC metering and the active metering enables the chip designer to actively protect their chips from being overbuilt.In this work,a new external active IC metering scheme is proposed to reduce the overhead due to the existing external active IC metering using asymmetric encryption module.The scheme mainly includes four parts: PUF design for key generation,modified FSM for retrieval of the PUF-based key,the locking part and a controller.Existing PUF design based on parallel scan design is adopted to generate PUF response.It was first proposed to modify the original FSM design to implement the secure extraction of PUF response.The lock scheme is implemented by controlling the working modes of some scan cells in the original design.The anti-fuse structure is inserted in the lock design so that when the input key is correct,the anti-fuse can be blown such that the state of unlocking can be recorded permanently.Hence,the imperfection of the PUF reliability can be overcome.The proposed scheme can resist typical attacks while just incurring low overhead.We also propose a new internal active IC metering method using a controlled strong PUF to prevent IC from being pirated and overbuilt.In this PUF-FSM,an extra FSM design is used to produce a correct signal to activate the HASH circuit.We propose to utilize the FSM structure of this PUF circuit to implement the locking mechanism of this internal active IC metering.Their transition conditions of the two FSM structures are identical in this IC metering excepting that the final state of the second FSM is the reset state of the chip and one FSM structure is used to generate a signal to activate hash,and the other is used to implement IC metering.The power-up state is the first state of the FSM of the PUF-FSM,so the user needs a correct key to make circuit jump from power-up state to reset state to work normally.The key to unlocking chip is a substring of PUF response.Because of this unique FSM structure,and the length of the unlock key is different,so this IC metering has better robustness and produced overhead is acceptable.