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The Research And Implementation Of Flash Memory Hardened Technology Based On BCH Code

Posted on:2020-06-05Degree:MasterType:Thesis
Country:ChinaCandidate:Z Q ZhangFull Text:PDF
GTID:2428330590973624Subject:Integrated circuit engineering
Abstract/Summary:PDF Full Text Request
In today's information explosion era,more storage media is needed to store information and data.Because NAND FLASH has the advantages of faster speed,smaller area and larger storage capacity,it has been widely used as a storage medium for digital systems,such as smart phones,computers,solid state drives and cloud storage.Therefore,the NAND FLASH flash memory market maintains a high growth rate every year.As the storage capacity of FlASH increases,the data stored in each storage unit is also increasing.The weak external interference will cause the storage state to change,resulting in errors in storing data.The reliability of the memory is also decreasing,so the encoding technology is needed to reinforce the memory.This paper mainly studies the theory of finite fields,the extension of finite fields,and the operations of elements on finite fields.On the basis of the finite field,the principle of encoding and decoding of BCH codes is mainly studied,and its implementation method.Combined with the page capacity of NAND FLASH,the parameters of the reasonable BCH code are set,and the codec of the BCH code is implemented by software and hardware.The algorithm for encoding and decoding is implemented in C language.After the encoding is completed,a 16-bit error is injected into the encoded result and a 16-bit error can be detected and corrected after software decoding.The enco der of BCH code is realized by the hardware description language Verilog,which is based on the principle of the division circuit and the encoder with parallel 8-bit input is designed.The decoder of the BCH code is implemented by the hardware description language Verilog.The process of decoding is much more complicated than the process of encoding.It is divided into three processes: syndrome calculation,error location polynomial calculation and money search.Each module's hardware contains a large number of multiplication circuits,each of which is implemented by parallel decoding,which can speed up the decoding speed of the hardware circuit.After testing the function of the code,the encoder and the decoder are connected.After the encoding is completed,a 16-bit error is injected into the codeword in the Flash memory model and the decoder can implement the correct function and prove the code can be applied to the flash memory.
Keywords/Search Tags:NAND FLASH, BCH code, Serial coding, Parallel decoding
PDF Full Text Request
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